Mapping Applications to an FPFA Tile
This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable architecture. The source code is first translated into a Control Dataflow graph (CDFG), which is minimized using a set of behaviour p...
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| creator | Rosien, Michel A. J. Guo, Yuanqing Smit, Gerard J. M. Krol, Thijs |
| description | This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable architecture. The source code is first translated into a Control Dataflow graph (CDFG), which is minimized using a set of behaviour preserving transformations such as dependency analysis, common subexpression elimination, etc. After applying graph clustering, scheduling and allocation transformations on this minimized graph, it can be mapped onto the target architecture. |
| doi_str_mv | 10.5555/789083.1022883 |
| format | Conference Proceeding |
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| fulltext | fulltext |
| identifier | ISSN: 1530-1591 |
| ispartof | Design, Automation, and Test in Europe: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1; 03-07 Mar. 2003, 2003, p.11124-11124 |
| issn | 1530-1591 |
| language | eng |
| recordid | cdi_acm_books_10_5555_789083_1022883 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Computer systems organization -- Architectures -- Other architectures -- Data flow architectures Computer systems organization -- Architectures -- Other architectures -- Reconfigurable computing Computer systems organization -- Architectures -- Other architectures -- Self-organizing autonomic computing |
| title | Mapping Applications to an FPFA Tile |
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