Scalable multi-cores with improved per-core performance using off-the-critical path reconfigurable hardware

Scaling the number of cores in a multi-core processor constraintsthe resources available in each core, resulting in reduced percoreperformance. Alternatively, the number of cores have to be reducedin order to improve per-core performance. In this paper, we propose atechnique to improve the per-core...

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Bibliographische Detailangaben
Hauptverfasser: Suri, Tameesh, Aggarwal, Aneesh
Format: Tagungsbericht
Sprache:eng
Online-Zugang:Volltext
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