Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor
Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power conver...
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| creator | Manoj, P. D. Sai Wang, Kanwen Yu, Hao |
| description | Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power converters are allocated for space-time multiplexed matching, which is physically enabled by 3D through-silicon-vias. Moreover, demand-response based task adjustment is applied to reduce peak power and to balance workload. The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload. |
| doi_str_mv | 10.1145/2463209.2488950 |
| format | Conference Proceeding |
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D. Sai ; Wang, Kanwen ; Yu, Hao</creator><creatorcontrib>Manoj, P. D. Sai ; Wang, Kanwen ; Yu, Hao</creatorcontrib><description>Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power converters are allocated for space-time multiplexed matching, which is physically enabled by 3D through-silicon-vias. Moreover, demand-response based task adjustment is applied to reduce peak power and to balance workload. The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload.</description><identifier>ISSN: 0738-100X</identifier><identifier>ISBN: 1450320716</identifier><identifier>ISBN: 9781450320719</identifier><identifier>EISBN: 1450320716</identifier><identifier>EISBN: 9781450320719</identifier><identifier>DOI: 10.1145/2463209.2488950</identifier><language>eng</language><publisher>New York, NY, USA: ACM</publisher><subject>3D thousand-core ; Covariance matrices ; Demand-supply matching ; Hardware -- Electronic design automation -- Physical design (EDA) ; Load management ; Microprocessors ; Multiplexing ; Peak power reduction ; Switches ; Through-silicon vias ; Voltage control ; Workload balancing</subject><ispartof>2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 2013, p.1-6</ispartof><rights>2013 ACM</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6560768$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,792,2051,27904,54736,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6560768$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Manoj, P. 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The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload.</description><subject>3D thousand-core</subject><subject>Covariance matrices</subject><subject>Demand-supply matching</subject><subject>Hardware -- Electronic design automation -- Physical design (EDA)</subject><subject>Load management</subject><subject>Microprocessors</subject><subject>Multiplexing</subject><subject>Peak power reduction</subject><subject>Switches</subject><subject>Through-silicon vias</subject><subject>Voltage control</subject><subject>Workload balancing</subject><issn>0738-100X</issn><isbn>1450320716</isbn><isbn>9781450320719</isbn><isbn>1450320716</isbn><isbn>9781450320719</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNqNkD9PwzAUxI0ACSidGVg8sqTYsZO8jKj8lSrBABJb5Ngv1DSJIztV6Sfga5PQDoxMT3e_uzccIReczTiXyXUsUxGzfBZLgDxhB-RscNlgZTw9_CuOyCnLBEScsfcTMg3hkzHGuYA4z07J9wuqFe3cBj31aNa6t66lqjV04_yqdsrQUtWq1bb9oOWWhk5pjHrbIG3WdW-7Gr9-kQpoqMFmqEZh3XX1ljaq18sRVs5TcUv7pVuHkWvnh7rV3nXeaQzB-XNyXKk64HR_J-Tt_u51_hgtnh-e5jeLSMUAfSQET5jMKxZXoFEyQDBcl4LFYECCgizLEsCygpKDxNzEMtfcpDnHMpEaxIRc7v5aRCw6bxvlt0WapCxLR3q1o0o3RencKhScFePexX7vYr_3EJ39M1qU3mIlfgD2rH5u</recordid><startdate>20130101</startdate><enddate>20130101</enddate><creator>Manoj, P. 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Sai ; Wang, Kanwen ; Yu, Hao</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a288t-3315049f02f8ce408e8d1cb3028d848a877758ebf8b184e9d249c1d691eb54c83</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>3D thousand-core</topic><topic>Covariance matrices</topic><topic>Demand-supply matching</topic><topic>Hardware -- Electronic design automation -- Physical design (EDA)</topic><topic>Load management</topic><topic>Microprocessors</topic><topic>Multiplexing</topic><topic>Peak power reduction</topic><topic>Switches</topic><topic>Through-silicon vias</topic><topic>Voltage control</topic><topic>Workload balancing</topic><toplevel>online_resources</toplevel><creatorcontrib>Manoj, P. D. Sai</creatorcontrib><creatorcontrib>Wang, Kanwen</creatorcontrib><creatorcontrib>Yu, Hao</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Manoj, P. D. Sai</au><au>Wang, Kanwen</au><au>Yu, Hao</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor</atitle><btitle>2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)</btitle><stitle>DAC</stitle><date>2013-01-01</date><risdate>2013</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><issn>0738-100X</issn><isbn>1450320716</isbn><isbn>9781450320719</isbn><eisbn>1450320716</eisbn><eisbn>9781450320719</eisbn><abstract>Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power converters are allocated for space-time multiplexed matching, which is physically enabled by 3D through-silicon-vias. Moreover, demand-response based task adjustment is applied to reduce peak power and to balance workload. The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload.</abstract><cop>New York, NY, USA</cop><pub>ACM</pub><doi>10.1145/2463209.2488950</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0738-100X |
| ispartof | 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 2013, p.1-6 |
| issn | 0738-100X |
| language | eng |
| recordid | cdi_acm_books_10_1145_2463209_2488950 |
| source | IEEE Electronic Library (IEL) |
| subjects | 3D thousand-core Covariance matrices Demand-supply matching Hardware -- Electronic design automation -- Physical design (EDA) Load management Microprocessors Multiplexing Peak power reduction Switches Through-silicon vias Voltage control Workload balancing |
| title | Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor |
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