Optimal TDMA time slot and cycle length allocation for hard real-time systems

We present an analytic method to determine the provably smallest possible slot length that must be allocated in a TDMA resource, to serve an event-triggered hard real-time load with arbitrary deterministic timing behavior. Based on this method, we then present constructive methods to find all feasib...

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Bibliographische Detailangaben
Hauptverfasser:	Wandeler, Ernesto, Thiele, Lothar
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computer systems organization > Embedded and cyber-physical systems Computer systems organization > Real-time systems Hardware > Communication hardware, interfaces and storage > Buses and high-speed links Hardware > Hardware validation
Online-Zugang:	Volltext
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