An Efficient Interface for the Integration of IoT Devices with Smart Grids von Viel, Felipe, Augusto Silva, Luis, Leithardt, Valderi Reis Quietinho, De Paz Santana, Juan Francisco, Celeste Ghizoni Teive, Raimundo, Albenes Zeferino, Cesar

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A Review of Techniques for Implementing Elliptic Curve Point Multiplication on Hardware von Verri Lucca, Arielle, Mariano Sborz, Guilherme, Leithardt, Valderi, Beko, Marko, Albenes Zeferino, Cesar, Parreira, Wemerson

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Performance and Security Evaluation on a Blockchain Architecture for License Plate Recognition Systems von Sestrem Ochôa, Iago, Reis Quietinho Leithardt, Valderi, Calbusch, Leonardo, De Paz Santana, Juan Francisco, Delcio Parreira, Wemerson, Oriel Seman, Laio, Albenes Zeferino, Cesar

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Hyperspectral Image Classification: An Analysis Employing CNN, LSTM, Transformer, and Attention Mechanism von Viel, Felipe, Maciel, Renato Cotrim, Seman, Laio Oriel, Zeferino, Cesar Albenes, Bezerra, Eduardo Augusto, Leithardt, Valderi Reis Quietinho

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Worst-Case Communication Time Analysis for On-Chip Networks With Finite Buffers von De Liz Bomer, Rubens Vicente, Zeferino, Cesar Albenes, Seman, Laio Oriel, Leithardt, Valderi Reis Quietinho

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Experimental data from the simulation of on-chip communication architectures using RedScarf simulation environment von da Silva, Eduardo Alves, Kreutz, Márcio Eduardo, Zeferino, Cesar Albenes

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Mechanisms to Provide Fault Tolerance to a Network-on-Chip von Felski Pereira, Thiago, Rossi de Melo, Douglas, Augusto Bezerra, Eduardo, Albenes Zeferino, Cesar

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A Hardware Accelerator for Onboard Spatial Resolution Enhancement of Hyperspectral Images von Viel, Felipe, Parreira, Wemerson Delcio, Susin, Altamiro Amadeu, Zeferino, Cesar Albenes

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Reliability analysis of a fault-tolerant RISC-V system-on-chip von Santos, Douglas Almeida, Luza, Lucas Matana, Dilillo, Luigi, Zeferino, Cesar Albenes, Melo, Douglas Rossi

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A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA von Martins, Lucas Amilton, Viel, Felipe, Seman, Laio Oriel, Bezerra, Eduardo Augusto, Zeferino, Cesar Albenes

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Digital Statelessness: The Gap Between Technological Advancement and the Full Guarantee of Human Rights von Suzin, Jaine Cristina, Zeferino, Cesar Albenes, Leithardt, Valderi Reis Quietinho

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Avaliação Empírica da Proposta Interdisciplinar de Uso dos Processadores BIP von Vieira, Paulo Viniccius, Zeferino, Cesar Albenes, Raabe, André Luis

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SPIN: a scalable, packet switched, on-chip micro-network von Adriahantenaina, A., Charlery, H., Greiner, A., Mortiez, L., Zeferino, C.A.

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Bipide – Ambiente de Desenvolvimento Integrado para a Arquitetura dos Processadores BIP von Vieira, Paulo Viníccius, Raabe, André Luis Alice, Zeferino, Cesar Albenes

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RASoC: a router soft-core for networks-on-chip von Zeferino, C.A., Kreutz, M.E., Susin, A.A.

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Deadline, Energy and Buffer-Aware Task Mapping Optimization in NoC-Based SoCs Using Genetic Algorithms von Bruch, Jaison Valmor, Alves da Silva, Eduardo, Zeferino, Cesar Albenes, Soares Indrusiak, Leandro

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Implementation of Techniques for Fault Tolerance in a Network-on-Chip von Veiga, Fabrício, Zeferino, Cesar Albenes

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Segurança em Redes-em-Chip: Conceitos e Revisão do Estado da Arte von Zeferino, Cesar Albenes, Baron, Sidnei, Wangham, Michelle Silva

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A basic processor for teaching digital circuits and systems design with FPGA von Pereira, M. C., Viera, P. V., Raabe, A. L. A., Zeferino, C. A.

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BrownPepper: A SystemC-based simulator for performance evaluation of Networks-on-Chip von Bruch, J. V., Pizzoni, M. R., Zeferino, C. A.

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