FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction von Cheung, Ray C. C., Duquesne, Sylvain, Fan, Junfeng, Guillermin, Nicolas, Verbauwhede, Ingrid, Yao, Gavin Xiaoxu

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Parameter Space for the Architecture of FFT-Based Montgomery Modular Multiplication von Chen, Donald Donglong, Yao, Gavin Xiaoxu, Cheung, Ray C. C., Pao, Derek, Koc, Çetin Kaya

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Novel RNS Parameter Selection for Fast Modular Multiplication von Yao, Gavin Xiaoxu, Fan, Junfeng, Cheung, Ray C.C., Verbauwhede, Ingrid

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Faster Pairing Coprocessor Architecture von Xiaoxu Yao, Gavin, Fan, Junfeng, Cheung, Ray, Verbauwhede, Ingrid

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Faster Pairing Coprocessor Architecture von Yao, Gavin Xiaoxu, Fan, Junfeng, Cheung, Ray C. C., Verbauwhede, Ingrid

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FPGA Implementations of Pairing using Residue Number System and Lazy Reduction von Cheung, Ray, Duquesne, Sylvain, Fan, Junfeng, Guillermin, Nicolas, Verbauwhede, Ingrid, Xiaoxu Yao, Gavin

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Counter Embedded Memory architecture for trusted computing platform von Yao, G X, Cheung, R C C, Kim Fung Man

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Side Channel Attacks and Their Low Overhead Countermeasures on Residue Number System Multipliers von Yao, Gavin Xiaoxu, Stöttinger, Marc, Cheung, Ray C. C., Huss, Sorin A.

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Low complexity and hardware-friendly spectral modular multiplication von Chen, D. D., Yao, G. X., Koc, C. K., Cheung, R. C. C.

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Reconfigurable Number Theoretic Transform architectures for cryptographic applications von Yao, G X, Cheung, R C C, Koç, Ç Kaya, Kim Fung Man

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