Design and energy-efficient architectures for nonvolatile static random access memory using magnetic tunnel junctions von Kitagata, Daiki, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture von Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Spin Injection Behavior of CoFe/MgO/Si Tunnel Contacts: Effects of Radical Oxygen Annealing von Akushichi, Taiju, Takamura, Yota, Shiotsu, Yusaku, Yamamoto, Shuu’ichirou, Sugahara, Satoshi

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Ultralow-Voltage Retention SRAM With a Power Gating Cell Architecture Using Header and Footer Power-Switches von Yoshida, Hayato, Shiotsu, Yusaku, Kitagata, Daiki, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Nonvolatile Power-Gating Field-Programmable Gate Array Using Nonvolatile Static Random Access Memory and Nonvolatile Flip-Flops Based on Pseudo-Spin-Transistor Architecture with Sp... von Yamamoto, Shuu'ichirou, Shuto, Yusuke, Sugahara, Satoshi

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Nonvolatile static random access memory based on spin-transistor architecture von Shuto, Yusuke, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Evaluation and Control of Break-Even Time of Nonvolatile Static Random Access Memory Based on Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions von Shuto, Yusuke, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Nonvolatile Static Random Access Memory Using Resistive Switching Devices: Variable-Transconductance Metal--Oxide--Semiconductor Field-Effect-Transistor Approach von Yamamoto, Shuu'ichirou, Shuto, Yusuke, Sugahara, Satoshi

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Modeling and Design of a New Piezoelectronic Transistor for Ultralow-Voltage High-Speed Integrated Circuits von Shiotsu, Yusaku, Yamamoto, Shuu'ichirou, Shuto, Yusuke, Funakubo, Hiroshi, Kurosawa, Minoru Kuribayashi, Sugahara, Satoshi

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Evaluation and Control of Break-Even Time of Nonvolatile Static Random Access Memory Based on Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions von Shuto, Yusuke, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems von YAMAMOTO, S, SHUTO, Y, SUGAHARA, S

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Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic von Yamamoto, Shuu’ichirou, Shuto, Yusuke, Sugahara, Satoshi

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Improved Data Disturbance Effects in 1T2C-Type Ferroelectric Memory Array von Kim, Hyun-Soo, Yamamoto, Shuu'ichirou, Ishiwara, Hiroshi

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Nonvolatile Power-Gating Field-Programmable Gate Array Using Nonvolatile Static Random Access Memory and Nonvolatile Flip-Flops Based on Pseudo-Spin-Transistor Architecture with Sp... von Yamamoto, Shuu'ichirou, Shuto, Yusuke, Sugahara, Satoshi

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A Novel Simulation Program with Integrated Circuit Emphasis (SPICE) Model of Ferroelectric Capacitors Using Schmitt Trigger Circuit von Shuu'ichirou Yamamoto, Shuu'ichirou Yamamoto, Takumi Kato, Takumi Kato, Hiroshi Ishiwara, Hiroshi Ishiwara

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Nonvolatile Delay Flip-Flop Based on Spin-Transistor Architecture and Its Power-Gating Applications von Yamamoto, Shuu'ichirou

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Energy-efficient operation at energy minimum point for ultralow-voltage-retention SRAM von Shiotsu, Yusaku, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Design and analysis of 8kB SRAM macro using a new ultralow-voltage-retention architecture von Shiotsu, Yusaku, Kitagata, Daiki, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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Low-Temperature Synthesis of SrBi2Ta2O9 Thin Films with Bi2SiO5-Containing Seed Layers von Wang, Xusheng, Yamamoto, Shuu'ichirou, Ishiwara, Hiroshi

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Design of ULVR-SRAM cell for near-threshold voltage operation von Hara, Takumi, Yoshida, Hayato, Shiotsu, Yusaku, Yamamoto, Shuu'ichirou, Sugahara, Satoshi

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