Ascend AI Processor Architecture and Programming von Xiaoyao, Liang

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Ascend AI Processor Architecture and Programming: Principles and Applications of CANN von Liang, Xiaoyao

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Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T–4R structure for high-density memory von Xie, Maosong, Jia, Yueyang, Nie, Chen, Liu, Zuheng, Tang, Alvin, Fan, Shiquan, Liang, Xiaoyao, Jiang, Li, He, Zhezhi, Yang, Rui

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Network structure and influencing factors of the quality of inbound tourism flows circulation von Lijun, MA, Xiaoyao, LIANG

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Quantitative analysis of abnormalities in gynecologic cytopathology with deep learning von Ke, Jing, Shen, Yiqing, Lu, Yizhou, Deng, Junwei, Wright, Jason D., Zhang, Yan, Huang, Qin, Wang, Dadong, Jing, Naifeng, Liang, Xiaoyao, Jiang, Fusong

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Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs von Jing, Naifeng, Jiang, Li, Zhang, Tao, Li, Chao, Fan, Fengfeng, Liang, Xiaoyao

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A Learning Algorithm for Bayesian Networks and Its Efficient Implementation on GPUs von Wang, Yu, Qian, Weikang, Zhang, Shuchang, Liang, Xiaoyao, Yuan, Bo

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Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency von Xiaoyao Liang, Gu-Yeon Wei, Brooks, D.

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A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs von Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Chakrabarty, Krishnendu, Naifeng Jing, Li Jiang

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Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU von Jing, Naifeng, Jiang, Shunning, Chen, Shuang, Zhang, Jingjie, Jiang, Li, Li, Chao, Liang, Xiaoyao

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Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability von Xiaoyao Liang, Canal, R., Gu-Yeon Wei, Brooks, D.

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Compiler assisted dynamic register file in GPGPU von Naifeng Jing, Haopeng Liu, Yao Lu, Xiaoyao Liang

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AI Processor Architecture and Programming: Principles and Applications of CANN With Ascend Processor von Liang Xiaoyao (author)

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E 2 -VOR: An End-to-End En/Decoder Architecture for Efficient Video Object Recognition von Song, Zhuoran, Jing, Naifeng, Liang, Xiaoyao

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A Federated Learning System for Histopathology Image Analysis with an Orchestral Stain-Normalization GAN von Shen, Yiqing, Sowmya, Arcot, Luo, Yulin, Liang, Xiaoyao, Shen, Dinggang, Ke, Jing

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E2-VOR: An End-to-End En/Decoder Architecture for Efficient Video Object Recognition von Song, Zhuoran, Jing, Naifeng, Liang, Xiaoyao

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AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture von Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang

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Vision Transformer Acceleration via a Versatile Attention Optimization Framework von Wang, Xuhang, Huang, Qiyue, Li, Xing, Jiang, Haozhe, Xu, Qiang, Liang, Xiaoyao, Song, Zhuoran

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ERA-BS: Boosting the Efficiency of ReRAM-Based PIM Accelerator With Fine-Grained Bit-Level Sparsity von Liu, Fangxin, Zhao, Wenbo, Wang, Zongwu, Chen, Yongbiao, Liang, Xiaoyao, Jiang, Li

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Process Variation Tolerant 3T1D-Based Cache Architectures von Xiaoyao Liang, Canal, R., Gu-Yeon Wei, Brooks, D.

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