On the Understanding and Modeling of Non-Negligible Subthreshold-State Degradation (SSD) in Sub-20-nm DRAM Technology von Wang, Da, Xue, Yongkang, Liu, Yong, Ren, Pengpeng, Sun, Zixuan, Wang, Zirui, Cheng, Zhijun, Yang, Haiyang, Liu, Xiangli, Wu, Blacksmith, Cao, Kanyu, Ji, Zhigang, Wang, Runsheng, Huang, Ru

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Understanding Retention Time Distribution in Buried-Channel-Array-Transistors (BCAT) Under Sub-20-nm DRAM Node-Part II: PBTI Aging and Optimization von Liu, Yong, Wang, Da, Ren, Pengpeng, Li, Jie, Qiao, Zheng, Wu, Maokun, Wen, Yichen, Zhou, Longda, Sun, Zixuan, Wang, Zirui, Han, Qinghua, Wu, Blacksmith, Cao, Kanyu, Wang, Runsheng, Ji, Zhigang, Huang, Ru

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Understanding Retention Time Distribution in Buried-Channel-Array-Transistors (BCAT) Under Sub-20-nm DRAM Node-Part I: Defect-Based Statistical Compact Model von Liu, Yong, Wang, Da, Ren, Pengpeng, Li, Jie, Qiao, Zheng, Wu, Maokun, Wen, Yichen, Zhou, Longda, Sun, Zixuan, Wang, Zirui, Han, Qinghua, Wu, Blacksmith, Cao, Kanyu, Wang, Runsheng, Ji, Zhigang, Huang, Ru

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On the understanding of defects in short-term Negative Bias Temperature Instability (NBTI) for sub-20-nm DRAM Technology von Wang, Da, Zhou, Longda, Xue, Yongkang, Ren, Pengpeng, Sun, Zixuan, Wang, Zirui, Wang, Jianping, Wu, Blacksmith, Ji, Zhigang, Wang, Runsheng, Huang, Ru

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Defect-Based Empirical Model for On-State Degradation in Sub-20-nm DRAM Periphery pFETs Under Arbitrary Condition von Wang, Da, Zhou, Longda, Xue, Yongkang, Ren, Pengpeng, Zhang, Lining, Li, Xiong, Liu, Xiangli, Wang, Jianping, Wu, Blacksmith, Ji, Zhigang, Wang, Runsheng, Cao, Kanyu, Huang, Ru

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Investigation on Cu TSV-Induced KOZ in Silicon Chips: Simulations and Experiments von Ming-Yi Tsai, Pu-Shan Huang, Chen-Yu Huang, Hsiu Jao, Huang, B., Wu, B., Yuan-Yuan Lin, Liao, W., Huang, J., Huang, L., Shih, S., Jeng Ping Lin

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Determination of TSV-induced KOZ in 3D-stacked DRAMs: Simulations and experiments von Huang, P. S., Tsai, M. Y., Huang, C. Y., Hsiu Jao, Huang, Brady, Wu, B., Lin, Y. Y., Liao, Will, Huang, Joe, Huang, Lawrence, Shih, S., Lin, J. P.

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The impact of through silicon via proximity on CMOS device von Hsiu Jao, Lin, Y. Y., Liao, W., Wu, B., Huang, B., Huang, L., Huang, J., Shih, S., Lin, J. P., Huang, P. S., Tsai, M. Y., Huang, C. Y.

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