High-performance microprocessor design von Gronowski, P.E., Bowhill, W.J., Preston, R.P., Gowan, M.K., Allmon, R.L.

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Design of an 8-wide superscalar RISC microprocessor with simultaneous multithreading von Preston, R.P., Badeau, R.W., Bailey, D.W., Bell, S.L., Biro, L.L., Bowhill, W.J., Dever, D.E., Felix, S., Gammack, R., Germini, V., Gowan, M.K., Gronowski, P., Jackson, D.B., Mehta, S., Morton, S.V., Pickholtz, J.D., Reilly, M.H., Smith, M.J.

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Configuration of base clock frequency of processor based on usage parameters von Srinivasan, Vasudevan, Gurumoorthy, Nagasubramanian, Bowhill, William J, Gupta, Nikhil, Garg, Vivek, Sistla, Krishnakanth V, Lerner, David P, Steiner, Ian M, Browne, John J, Das, Ripan, MacNamara, Chris, Gough, Corey D, Vora, Sujal A, Sullivan, Joseph M, Ramamurthy, Venkatesh, Varma, Ankush

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Data center power management von Nolan, Christopher, Bowhill, William J, Agnew, Padraic, Marjanovic, Nemanja, Hanily, Colin, MacNamara, Christopher, Sexton, Rory, Browne, John J

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A 433-MHz 64-b quad-issue RISC microprocessor von Gronowski, P.E., Bowhill, W.J., Donchin, D.R., Blake-Campos, R.P., Carlson, D.A., Equi, E.R., Loughlin, B.J., Mehta, S., Mueller, R.O., Olesin, A., Noorlag, D.J.W., Preston, R.P.

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CONFIGURATION OF BASE CLOCK FREQUENCY OF PROCESSOR BASED ON USAGE PARAMETERS von Srinivasan, Vasudevan, Gurumoorthy, Nagasubramanian, Bowhill, William J, Gupta, Nikhil, Garg, Vivek, Sistla, Krishnakanth V, Lerner, David P, Steiner, Ian M, Browne, John J, Das, Ripan, MacNamara, Chris, Gough, Corey D, Vora, Sujal A, Sullivan, Joseph M, Ramamurthy, Venkatesh, Varma, Ankush

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Configuration of base clock frequency of processor based on usage parameters von Srinivasan, Vasudevan, Gurumoorthy, Nagasubramanian, Bowhill, William J, Gupta, Nikhil, Garg, Vivek, Sistla, Krishnakanth V, Lerner, David P, Steiner, Ian M, Browne, John J, Das, Ripan, MacNamara, Chris, Gough, Corey D, Vora, Sujal A, Sullivan, Joseph M, Ramamurthy, Venkatesh, Varma, Ankush

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Design of an 8-wide superscalar RISC microprocessor with simultaneous multithreading von Preston, R.P., Badeau, R.W., Bailey, D.W., Bell, S.L., Biro, L.L., Bowhill, W.J., Dever, D.E., Felix, S., Gammack, R., Germini, V., Gowan, M.K., Gronowski, P., Jackson, D.B., Mehta, S., Morton, S.V., Pickholtz, J.D., Reilly, M.H., Smith, M.J.

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CONFIGURATION OF BASE CLOCK FREQUENCY OF PROCESSOR BASED ON USAGE PARAMETERS von Srinivasan, Vasudevan, Gurumoorthy, Nagasubramanian, Bowhill, William J, Gupta, Nikhil, Garg, Vivek, Sistla, Krishnakanth V, Lerner, David P, Steiner, Ian M, Browne, John J, Das, Ripan, MacNamara, Chris, Gough, Corey D, Vora, Sujal A, Sullivan, Joseph M, Ramamurthy, Venkatesh, Varma, Ankush

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Managing power consumption in a multi-core processor von William J Bowhill, Efraim Rotem, Satish Shrimali, Alon Naveh, Lokesh Sharma, Don Soltis, Vivek Garg, Rakesh Kumar, Krishnakanth Sistla, Eric Fetzer, Reid J Reidlinger

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Data Center Power Management von Nolan, Christopher, Bowhill, William J, Agnew, Padraic, Marjanovic, Nemanja, Hanily, Colin, MacNamara, Christopher, Sexton, Rory, Browne, John J

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RECHENSYSTEM, COMPUTERLESBARES MEDIUM UND BEDARFSSKALIERUNGSENGINE ZUM KOMMUNIKATIVEN KOPPELN AN EINEN PROZESSOR von Nolan, Christopher, Bowhill, William J, Agnew, Padraic, Marjanovic, Nemanja, Hanily, Colin, MacNamara, Christopher, Sexton, Rory, Browne, John J

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CONFIGURATION OF BASE CLOCK FREQUENCY OF PROCESSOR BASED ON USAGE PARAMETERS von LERNER, David P, VARMA, Ankush, GURUMOORTHY, Nagasubramanian, BROWNE, John J, GUPTA, Nikhil, GARG, Vivek, RAMAMURTHY, Venkatesh, DAS, Ripan, MACNAMARA, Chris, SRINIVASAN, Vasudevan, SISTLA, Krishnakanth V, STEINER, Ian M, SULLIVAN, Joseph M, GOUGH, Corey D, BOWHILL, William J, VORA, Sujal A

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CONFIGURATION OF BASE CLOCK FREQUENCY OF PROCESSOR BASED ON USAGE PARAMETERS von LERNER, David P, VARMA, Ankush, GURUMOORTHY, Nagasubramanian, BROWNE, John J, GUPTA, Nikhil, GARG, Vivek, RAMAMURTHY, Venkatesh, DAS, Ripan, MACNAMARA, Chris, SRINIVASAN, Vasudevan, SISTLA, Krishnakanth V, STEINER, Ian M, SULLIVAN, Joseph M, GOUGH, Corey D, BOWHILL, William J, VORA, Sujal A

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A 300-MHz 64-b quad-issue CMOS RISC microprocessor von Benschneider, B.J., Black, A.J., Bowhill, W.J., Britton, S.M., Dever, D.E., Donchin, D.R., Dupcak, R.J., Fromm, R.M., Gowan, M.K., Gronowski, P.E., Kantrowitz, M., Lamere, M.E., Mehta, S., Meyer, J.E., Mueller, R.O., Olesin, A., Preston, R.P., Priore, D.A., Santhanam, S., Smith, M.J., Wolrich, G.M.

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Configuring base clock frequency of processor based on usage parameters von STEINER IAN M, SULLIVAN JAMIE M, DAS RAJSEKHAR, VORA SUJAL A, BOWHILL WILLIAM J, GURUMOSH, NARAYAN, RAMAMURTHY VENKATESH, BROWNE JOHN J, MACNAMARA CHRIS, GUPTA NITIN, VARMA ANKUSH, SRINIVASAN VIDYA, SISTLA KRISHNAKANTH V, GARG VIVEK, GOUGH COREY D, LERNER DAVID P

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Managing power consumption in a multi-core processor von FETZER ERIC, SOLTIS DON, SISTLA KRISHNAKANTH, BOWHILL WILLIAM J, GARG VIVEK, REIDLINGER REID J, NAVEH ALON, SHARMA LOKESH, SHRIMALI SATISH, ROTEM EFRAIM, KUMAR RAKESH

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A highly testable and diagnosable fabrication process test chip von Bhavsar, D.K., Echeruo, U., Akeson, D.R., Bowhill, W.J.

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A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor von Benschneider, B.J., Bowhill, W.J., Copper, E.M., Gavrielov, M.N., Gronowski, P.E., Maheshwari, V.K., Peng, V., Pickholtz, J.D., Samudrala, S.

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A 300 MHz 64 b quad-issue CMOS RISC microprocessor von Bowhill, W.J., Allmon, R.L., Bell, S.L., Cooper, E.M., Donchin, D.R., Edmondson, J.H., Fischer, T.C., Gronowski, P.E., Jain, A.K., Kroesen, P.L., Loughlin, B.J., Preston, R.P., Rubinfeld, P.I., Smith, M.J., Thierauf, S.C., Wolrich, G.M.

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