Design guidelines for Suzuki stacks as reliable high-speed Josephson voltage drivers von Ortlepp, T, Zheng, L, Whiteley, S R, Van Duzer, T

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Characterization of 4 K CMOS devices and circuits for hybrid Josephson-CMOS systems von Yoshikawa, N., Tomida, T., Tokuda, M., Liu, Q., Meng, X., Whiteley, S.R., Van Duzer, T.

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Simulation and measurements on a 64-kbit hybrid Josephson-CMOS memory von Liu, Q., Van Duzer, T., Meng, X., Whiteley, S.R., Fujiwara, K., Tomida, T., Tokuda, K., Yoshikawa, N.

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Josephson-CMOS hybrid memory with ultra-high-speed interface circuit von Feng, Y.J., Meng, X., Whiteley, S.R., Van Duzer, T., Fujiwara, K., Miyakawa, H., Yoshikawa, N.

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Monte Carlo and thermal noise analysis of ultra-high-speed high temperature superconductor digital circuits von Jeffery, M., Xie, P.Y., Whiteley, S.R., Van Duzer, T.

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Josephson junctions in SPICE3 von Whiteley, S.R.

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Self-timing and vector processing in RSFQ digital circuit technology von Deng, Z.J., Yoshikawa, N., Whiteley, S.R., Van Duzer, T.

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High data rate switch with amplifier chip von Sandell, R.D., Spargo, J.W., Leung, M., Whiteley, S.R.

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Simulation and 18 Gb/s testing of a data-driven self-timed RSFQ demultiplexer von Yoshikawa, N., Deng, Z.J., Whiteley, S.R., Van Duzer, T.

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Latency and Power Measurements on a 64-kb Hybrid Josephson-CMOS Memory von Liu, Q., Fujiwara, K., Meng, X., Whiteley, S.R., Van Duzer, T., Yoshikawa, N., Thakahashi, Y., Hikida, T., Kawai, N.

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64-kb Hybrid Josephson-CMOS 4 Kelvin RAM With 400 ps Access Time and 12 mW Read Power von Van Duzer, T., Lizhen Zheng, Whiteley, S. R., Kim, Hoki, Jaewoo Kim, Xiaofan Meng, Ortlepp, T.

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High-speed decimation filter for delta-sigma analog-to-digital converter von Xie, Y.P., Whiteley, S.R., van Duzer, T.

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Data-driven self-timed RSFQ digital integrated circuit and system von Deng, Z.J., Yoshikawa, N., Whiteley, S.R., Van Duzer, T.

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Engineering issues in high-frequency RSFQ circuits von Van Duzer, T, Zheng, L, Meng, X, Loyo, C, Whiteley, S.R, Yu, L, Newman, N, Rowell, J.M, Yoshikawa, N

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A high performance Josephson binary counter implemented in Nb and NbN technology von Whiteley, S.R., Kuo, F.

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A three-phase single flux quantum shift register with serial biasing von Whiteley, S.R., Barfknecht, A.T.

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High-Speed Hybrid Superconductor-to-Semiconductor Interface Circuit With Ultra-Low Power Consumption von Ortlepp, T., Whiteley, S. R., Lizhen Zheng, Xiaofan Meng, Van Duzer, T.

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Implementation and low speed test of ultra-fast interface circuits for Josephson-CMOS hybrid memories von Fujiwara, K, Miyakawa, H, Yoshikawa, N, Feng, Y, Whiteley, S.R, Van Duzer, T

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INDEX: an inductance extractor for superconducting circuits von Xiao, P.M., Charbon, E., Sangiovanni-Vincentelli, A., Van Duzer, T., Whiteley, S.R.

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Data-driven self-timed RSFQ high-speed test system von Deng, Z.J., Yoshikawa, N., Whiteley, S.R., Van Duzer, T.

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