A 4.6-μm, 127-dB Dynamic Range, Ultra-Low Power Stacked Digital Pixel Sensor With Overlapped Triple Quantization von Ikeno, Rimon, Mori, Kazuya, Uno, Masayuki, Miyauchi, Ken, Isozaki, Toshiyuki, Takayanagi, Isao, Nakamura, Junichi, Wuu, Shou-Gwo, Bainbridge, Lyle, Berkovich, Andrew, Chen, Song, Chilukuri, Ramakrishna, Gao, Wei, Tsai, Tsung-Hsun, Liu, Chiao

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A Review of 3-Dimensional Wafer Level Stacked Backside Illuminated CMOS Image Sensor Process Technologies von Wuu, Shou-Gwo, Chen, Hsin-Li, Chien, Ho-Ching, Enquist, Paul, Guidash, R. Michael, McCarten, John

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A 4.0 μm Stacked Digital Pixel Sensor Operating in a Dual Quantization Mode for High Dynamic Range von Mori, Kazuya, Yasuda, Naoto, Miyauchi, Ken, Isozaki, Toshiyuki, Takayanagi, Isao, Nakamura, Junichi, Chien, Ho-Ching, Fu, Ken, Wuu, Shou-Gwo, Berkovich, Andrew, Chen, Song, Gao, Wei, Liu, Chiao

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Extraction and Estimation of Pinned Photodiode Capacitance in CMOS Image Sensors von Chao, Calvin Yi-Ping, Yi-Che Chen, Kuo-Yu Chou, Jhy-Jyi Sze, Fu-Lung Hsueh, Shou-Gwo Wuu

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Nonsilicide source/drain pixel for 0.25-μm CMOS image sensor von Dun-Nian Yaung, Shou-Gwo Wuu, Yean-Kuen Fang, Wang, C.S., Chien-Hsien Tseng, Mon-Song Lian

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A new and improved borderless contact (BLC) structure for high-performance Ti-salicide in sub-quarter micron CMOS devices von Liu, Wen-Chau, Thei, Kong-Beng, Wang, Wei-Chou, Pan, Hsi-Jen, Wuu, Shou-Gwo, Lei, Ming-Ta, Wang, Chung-Shu, Cheng, Shiou-Ying

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A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-μm CMOS devices applications von Thei, K-B, Liu, W-C, Chuang, H-M, Lin, K-W, Cheng, C-C, Ho, C-H, Su, C-W, Wuu, S-G, Wang, C-S

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A 3.96- \mu m, 124-dB Dynamic-Range, Digital-Pixel Sensor With Triple-and Single-Quantization Operations for Monochrome and Near-Infrared Dual-Channel Global Shutter Operation von Miyauchi, Ken, Uno, Masayuki, Isozaki, Toshiyuki, Fukuhara, Hideyuki, Mori, Kazuya, Abe, Hirofumi, Nagamatsu, Masato, Ikeno, Rimon, Takayanagi, Isao, Chen, Hsin-Li, Lin, Chih-Hao, Fu, Wen-Chien, Wuu, Shou-Gwo, Chen, Song, Bainbridge, Lyle, Chao, Qing, Chilukuri, Ramakrishna, Gao, Wei, Hammond, Andrew P., Tsai, Tsung-Hsun, Liu, Chiao

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A Comparison of Behaviors between Hydrogenated/Unhydrogenated Polysilicon Thin Film Transistors under Electric Stress von Yaung, Dun-Nian, Fang, Yean-Kuen, Lee, Kan-Yuan, Hwang, Kuo-Ching, Wuu, Shou-Gwo, Liang, Mong-Song

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On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure von Thei, Kong-Beng, Chuang, Hung-Ming, Yu, Kuo-Hui, Liu, Wen-Chau, Liu, Rong-Chau, Lin, Kun-Wei, Su, Chi-Wen, Ho, Chin-Shiung, Wuu, Shou-Gwo, Wang, Chung-Shu

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Rapid thermal annealing on the characteristics of polysilicon thin-film transistors in practical TFT SRAM process von Lee, Kan Yuan, Pang, Yean Kuen, Chen, Chii-Wen, Liang, Mong Song, Wuu, Shou Gwo

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The impacts of back-end high temperature thermal treatments on the characteristics and gate oxide reliability of thin film transistor in ultra large scale integrated circuit proces... von LEE, K. Y, FANG, Y. K, CHEN, C. W, YAUNG, D. N, WUU, K. H, HO, J. J, LIANG, M. S, WUU, S. G

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High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel von Shou-Gwo Wuu, Dun-Nian Yaung, Chien-Hsien Tseng, Ho-Ching Chien, Wang, C.S., Yean-Kuen Hsiao, Chin-Kung Chang, Chang, B.J.

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Semiconductor devices having reduced noise von Wuu, Shou-Gwo, Sze, Jhy-Jyi, Hung, Feng-Chi

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Semiconductor Devices Having Reduced Noise von Wuu, Shou-Gwo, Sze, Jhy-Jyi, Hung, Feng-Chi

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Semiconductor devices having reduced noise von Wuu, Shou-Gwo, Sze, Jhy-Jyi, Hung, Feng-Chi

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Nonsilicide source/drain pixel for 0.25-/spl mu/m CMOS image sensor von Dun-Nian Yaung, Shou-Gwo Wuu, Yean-Kuen Fang, Wang, C.S., Chien-Hsien Tseng, Mon-Song Lian

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Nonsilicide source/drain pixel for 0.25-[micro]m CMOS image sensor von Yaung, Dun-Nian, Wuu, Shou-Gwo, Fang, Yean-Kuen, Wang, C.S, Tseng, Chien-Hsien, Lian, Mon-Song

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Methods of Manufacturing Semiconductor Devices von Sze Jhy-Jyi, Wuu Shou-Gwo, Hung Feng-Chi

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A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-[mu]m CMOS devices applications von Thei, Kong-Beng, Liu, Wen-Chau, Chuang, Hung-Ming, Lin, Kun-Wei, Cheng, Chin-Chuan, Ho, Chin-Hsiung, Su, Chi-Wen, Wuu, Shou-Gwo, Wang, Chung-Shu

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