A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology von PLOUCHART, Jean-Olivier, KIM, Jonghae, WAGNER, Lawrence F, ZAMDMER, Noah, LU, Liang-Hung, SHERONY, Melanie, YUE TAN, GROVES, Robert A, TRZCINSKI, Robert, TALBI, Mohamed, RAY, Asit

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Design of wide-band CMOS VCO for multiband wireless LAN applications von Fong, N.H.W., Plouchart, J.-O., Zamdmer, N., Duixian Liu, Wagner, L.F., Plett, C., Tarr, N.G.

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A 1-V 3.8 - 5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology von Fong, N.H.W., Plouchart, J.-O., Zamdmer, N., Duixian Liu, Wagner, L.F., Plett, C., Tarr, N.G.

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SRAM bitline circuits on PD SOI: advantages and concerns von Kuang, J.B., Ratanaphanyarat, S., Saccamango, M.J., Hsu, L.L.-C., Flaker, R.C., Wagner, L.F., Chu, S.-F. S., Shahidi, G.G.

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VBIC95, the vertical bipolar inter-company model von McAndrew, C.C., Seitchik, J.A., Bowers, D.F., Dunn, M., Foisy, M., Getreu, I., McSwain, M., Moinian, S., Parker, J., Roulston, D.J., Schroter, M., van Wijnen, P., Wagner, L.F.

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Floating-body effects in partially depleted SOI CMOS circuits von Pong-Fei Lu, Ching-Te Chuang, Jin Ji, Wagner, L.F., Chang-Ming Hsieh, Kuang, J.B., Hsu, L.L.-C., Pelella, M.M., Chu, S.-F.S., Anderson, C.J.

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A 243-GHz Ft and 208-GHz Fmax, 90-nm SOI CMOS SoC technology with low-power mmwave digital and RF circuit capability : Integrated Circuits Technologies for RF Circuit Applications von PLOUCHART, Jean-Olivier, ZAMDMER, Noah, KIM, Jonghae, TRZCINSKI, Robert, NARASIMHA, Shreesh, KHARE, Mukesh, WAGNER, Lawrence F, SWEENEY, Susan L, CHALOUX, Susan

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Distortion Simulations with the PSP Model: Common-Gate Circuits von Olsen, C.M., Wagner, L.F., Watts, J., Jones, J.R., Croston, R., Pekarik, J.J.

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Merged field effect transistor cells for switching von Wagner, Jr, Lawrence F, Wolf, Randy L

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Probing the minority-carrier quasi-Fermi level in epitaxial Schottky-barrier diodes von Wagner, L.F., Chuang, C.T.

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Method for obtaining DC convergence for SOI FET models in a circuit simulation program von Kimmel, Richard, Wagner, Jr., Lawrence F

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Comparator array logic von GUADAGNA, JOHN P, WAGNER, LAWRENCE F, BURLESON, WAYNE P

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Logarithmic calculating apparatus von WAGNER, LAWRENCE F, BURLESON, WAYNE P, VAN DYKE, KORBIN S

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Logarithmic conversion apparatus von WAGNER, LAWRENCE F, BURLESON, WAYNE P, VAN DYKE, KORBIN S

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Digital processor with a four part data register for storing data before and after data conversion and data calculations von GUADAGNA, JOHN P, WAGNER, LAWRENCE F, BURLESON, WAYNE P, VAN DYKE, KORBIN S, HEMMING, ROBERT D

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Index for a register file with update of addresses using simultaneously received current, change, test, and reload addresses von GUADAGNA, JOHN P, WAGNER, LAWRENCE F, BURLESON, WAYNE P, VAN DYKE, KORBIN S, HEMMING, ROBERT D

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VERTICAL-BASE CMOS COMPATIBLE LATERAL BIPOLAR TRANSISTOR von MEI, SHAW-NING, KNEPPER, RONALD WILLIAM, WAGNER, LAWRENCE F., JR, HSIEH, CHANG-MING, HSU, LOUIS L.C

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Method of checking the layout versus the schematic of multi-fingered MOS transistor layouts using a sub-circuit based extraction von Singh, Raminderpal, Tan, Yue, Plouchart, Jean-Oliver, Wagner, Jr, Lawrence F, Talbi, Mohamed, Safran, John M, Wu, Kun

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Vertical-base CMOS compatible lateral bipolar transistor von MEI, SHAW-NING, KNEPPER, RONALD WILLIAM, WAGNER, LAWRENCE F., JR, HSIEH, CHANG-MING, HSU, LOUIS L.C

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MEJORAS EN SISTEMA PARA RECONOCIMIENTO Y REPRODUCCION DE VOZ von LAWRENCE F. WAGNER, STEPHEN P. GILL, KLAUS-PETER A. BANTOWSKY, GREGORY G. FRYE

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