A 14-mW 6.25-Gb/s Transceiver in 90-nm CMOS von Poulton, J., Palmer, R., Fuller, A.M., Greer, T., Eyles, J., Dally, W.J., Horowitz, M.

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Research Challenges for On-Chip Interconnection Networks von Owens, J.D., Dally, W.J., Ho, R., Jayasimha, D.N., Keckler, S.W., Li-Shiuan Peh

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Low-power area-efficient high-speed I/O circuit techniques von Lee, M.-J.E., Dally, W.J., Chiang, P.

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Guaranteed scheduling for switches with configuration overhead von Towles, B., Dally, W.J.

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Jitter transfer characteristics of delay-locked loops - theories and design techniques von Lee, M.-J.E., Dally, W.J., Greer, T., Hiok-Tiaq Ng, Farjad-Rad, R., Poulton, J., Senthinathan, R.

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A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing von Khailany, B.K., Williams, T., Lin, J., Long, E.P., Rygh, M., Tovey, D.W., Dally, W.J.

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Flattened Butterfly Topology for On-Chip Networks von Kim, J., Balfour, J., Dally, W.J.

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Performance analysis of k-ary n-cube interconnection networks von Dally, W.J.

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Route packets, not wires: on-chip interconnection networks von Dally, W.J., Towles, B.

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Deadlock-free adaptive routing in multicomputer networks using virtual channels von Dally, W.J., Aoki, H.

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An Energy-Efficient Processor Architecture for Embedded Systems von Balfour, J., Dally, W.J., Black-Schaffer, D., Parikh, V., JongSoo Park

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A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os von Farjad-Rad, R., Nguyen, A., Tran, J.M., Greer, T., Poulton, J., Dally, W.J., Edmondson, J.H., Senthinathan, R., Rathi, R., Lee, M.-J.E., Hiok-Tiaq Ng

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Technology-Driven, Highly-Scalable Dragonfly Topology von Kim, John, Dally, Wiliam J., Scott, Steve, Abts, Dennis

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A second-order semidigital clock recovery circuit based on injection locking von Hiok-Tiaq Ng, Farjad-Rad, R., Lee, M.-J.E., Dally, W.J., Greer, T., Poulton, J., Edmondson, J.H., Rathi, R., Senthinathan, R.

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Globally Adaptive Load-Balanced Routing on Tori von Singh, A., Dally, W.J., Towles, B., Gupta, A.K.

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A bandwidth-efficient architecture for media processing von Rixner, S., Dally, W.J., Kapasi, U.J., Khailany, B., Lopez-Lagunas, A., Mattson, P.R., Owens, J.D.

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Worst-case Traffic for Oblivious Routing Functions von Towles, B., Dally, W.J.

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Efficient Embedded Computing von Dally, W.J., Balfour, J., Black-Shaffer, D., Chen, J., Harting, R.C., Parikh, V., Park, J., Sheffield, D.

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Express cubes: improving the performance of k-ary n-cube interconnection networks von Dally, W.J.

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Programmable stream processors von Kapasi, U.J., Rixner, S., Dally, W.J., Khailany, B., Jung Ho Ahn, Mattson, P., Owens, J.D.

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