Computational Simulation of a Field-Induced Charged Board Event Test Bench Using Transient Analysis von Chumpen, S., Pimpakun, S., Plong-ngooluam, S., Voldman, S.H., Sa-ngiamsak, C.

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The state of the art of electrostatic discharge protection: physics, technology, circuits, design, simulation, and scaling von Voldman, S.H.

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Experiments and failure analysis of a charged board event on a hard disk drive printed circuit board assembly von Chumpen, S., Pimpakun, S., Charoen, B., Pornnimitra, S., Plong-ngooluam, S., Voldman, S.H., Sa-ngiamsak, C.

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A parasitic impedance effect study using a discharge probe for FICBE testing based on CDM waveform verification von Pimpakun, S., Chumpen, S., Plong-ngooluam, S., Voldman, S.H., Sa-ngiamsak, C.

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Electrostatic Discharge: From Electrical breakdown in Micro-gaps to Nano-generators von Steven H. Voldman

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Integrated Circuit Design for Radiation Environments von Gaul, Stephen J, van Vonno, Nicolaas, Voldman, Steven H, Morris, Wesley H

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ESD: Design and Synthesis von Voldman, Steven H

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Latchup in merged triple well structure von Voldman, S., Gebreselasie, E., Zierak, M., Hershberger, D., Collins, D., Feilchenfeld, N., St Onge, S., Dunn, J.

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The influence of a silicon dioxide-filled trench isolation structure and implanted sub-collector on latchup robustness von Voldman, S., Gebreselasie, E., Lanzerotti, L., Larsen, T., Feilchenfeld, N., St Onge, S., Joseph, A., Dunn, J.

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The impact of MOSFET technology evolution and scaling on electrostatic discharge protection von Voldman, Steven H

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A strategy for characterization and evaluation of ESD robustness of CMOS semiconductor technologies von Voldman, S, Anderson, W, Ashton, R, Chaine, M, Duvvury, C, Maloney, T, Worley, E

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ESD basics: from semiconductor manufacturing to use von Voldman, Steven H

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Dynamic threshold body- and gate-coupled SOI ESD protection networks von Voldman, S., Assaderaghi, F., Mandelman, J., Hsu, L., Shahidi, G.

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Electrostatic discharge (ESD) protection in silicon-on-insulator (SOI) CMOS technology with aluminum and copper interconnects in advanced microprocessor semiconductor chips von Voldman, S., Hui, D., Warriner, L., Young, D., Howard, J., Assaderaghi, F., Shahidi, G.

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Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry von Voldman, S., Hui, D., Young, D., Williams, R., Dreps, D., Howard, J., Sherony, M., Assaderaghi, F., Shahidi, G.

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Linewidth control effects on MOSFET ESD robustness von Voldman, S, Never, J, Holmes, S, Adkisson, J

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High current transmission line pulse (TLP) and ESD characterization of a silicon germanium heterojunction bipolar transistor with carbon incorporation von Ronan, B., Voldman, S., Lanzerotti, L., Rascoe, J., Sheridan, D., Rajendran, K.

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The effects of gate field on the leakage characteristics of heavily doped junctions von Noble, W.P., Voldman, S.H., Bryant, A.

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CMOS-on-SOI ESD protection networks von Voldman, S., Schulz, R., Howard, J., Gross, V., Wu, S., Yapsir, A., Sadana, D., Hovel, H., Walker, J., Assaderaghi, F., Chen, B., Sun, J.Y-C., Shahidi, G.

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MeV implants boost device design von Voldman, S.H.

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