Boolean-Complement Based Fault-Tolerant Electronic Device Architectures von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Duplication of Boolean Complements for Synthesis of Fault-Tolerant Digital Devices and Systems von Sapozhnikov, V. V., Sapozhnikov, Vl. V., Efanov, D. V.

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Organization of Testing of Combinational Devices Based on Boolean Complement to Constant-Weight “1-out-of-4” Code with Signal Compression von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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New structures of the concurrent error detection systems for logic circuits von Sapozhnikov, V. V., Sapozhnikov, Vl. V., Efanov, D. V., Dmitriev, V. V.

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Sum Codes with Fixed Values of Multiplicities for Detectable Unidirectional and Asymmetrical Errors for Technical Diagnostics of Discrete Systems von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Synthesis of Self-Checking Combination Devices Based on Allocating Special Groups of Outputs von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger’s code von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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The Synthesis Conditions of Completely Self-Testing Embedded-Control Circuits Based on the Boolean Complement Method to the “1-out-of-m” Constant-Weight Code von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V., Pivovarov, D. V.

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Organization of a Fully Self-Checking Structure of a Combinational Device Based on Searching for Groups of Symmetrically Independent Outputs von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Synthesis of Built-in Self-Test Control Circuits Based on the Method of Boolean Complement to Constant-Weight 1-out-of-n Codes von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V., Pivovarov, D. V.

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Sum Codes with Efficient Detection of Twofold Errors for Organization of Concurrent Error-Detection Systems of Logical Devices von Dmitriev, V. V., Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Using Codes with Summation of Weighted Bits to Organize Checking of Combinational Logical Devices von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Two-Modulus Codes with Summation of On-Data Bits for Technical Diagnostics of Discrete Systems von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Signal correction for combinational automation devices on the basis of Boolean complement with control of calculations by parity von Sapozhnikov, V. V., Sapozhnikov, Vl. V., Efanov, D. V.

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On codes with summation of data bits in concurrent error detection systems von Blyudov, A. A., Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Applications of modular summation codes to concurrent error detection systems for combinational boolean circuits von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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On summation code properties in functional control circuits von Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, VI. V.

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Summation codes for organization of control of combinational circuits von Blyudov, A. A., Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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A modified summation code for organizing control of combinatorial circuits von Blyudov, A. A., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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Checking of combinational circuits basing on modification sum codes von Mekhov, V. B., Sapozhnikov, V. V., Sapozhnikov, Vl. V.

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