Digital fractional-order differentiator and integrator models based on first-order and higher order operators von Gupta, Maneesha, Varshney, Pragya, Visweswaran, G. S.

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A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS von Grover, Anuj, Visweswaran, G. S., Parthasarathy, Chittoor R., Daud, Mohammad, Turgis, David, Giraud, Bastien, Noel, Jean-Philippe, Miro-Panades, Ivan, Moritz, Guillaume, Beigne, Edith, Flatresse, Philippe, Kumar, Promod, Azmi, Shamsi

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New Approach to Realize Fractional Power in z-Domain at Low Frequency von Visweswaran, G S, Varshney, P, Gupta, M

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Switched Capacitor Realizations of Fractional-Order Differentiators and Integrators Based on an Operator with Improved Performance von P. Varshney, M. Gupta, G. S. Visweswaran

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Charge-Controlled Oscillators and Their Application in Frequency Synthesis von Kaushik, Roohie, Chatterjee, Shouri, Visweswaran, G. S.

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New Approach to Realize Fractional Power in [Formula Omitted]-Domain at Low Frequency von Visweswaran, G. S, Varshney, P, Gupta, M

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Quaternary logic circuits in 2- mu m CMOS technology von Shanbhag, N.R., Nagchoudhuri, D., Siferd, R.E., Visweswaran, G.S.

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Design of a ternary D/A converter von NOSHABADI, S. M., VISWESWARAN, G. S., NAGCHOUDHURI, D.

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Implementation of first and third order fractional order differentiators and integrators using switched capacitors von Varshney, Pragya, Gupta, Maneesha, Visweswaran, G S

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The effects of transistor source-to-gate bridging faults in complex CMOS gates von Visweswaran, G.S., Ali, A.-u.-z.M., Lala, P.K., Hartmann, C.R.P.

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A MOS transistor thermal sub-circuit for the SPICE circuit simulator von Nooshabadi, Saeiid, Visweswaran, G.S., Nagchoudhuri, D.

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Design issues in wide scanning range cognitive radios von Girish, V, Nair, A C, Visweswaran, G S

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Modulated wavelet basis von Jiwani, L K, Joshi, S D, Visweswaran, G S

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A P1500 compliant programmable BistShell for embedded memories von Koranne, S., Wouters, C., Waayers, T., Kumar, S., Beurze, R., Visweswaran, G.S.

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Time-domain sensitivity analysis of dynamic sense amplifier of an n-MOS dynamic RAM von Jain, N., Visweswaran, G., Bhattacharyya, A.

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Current transport in large-area Schottky barrier diodes von Visweswaran, G.S., Sharan, R.

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A relative comparative based datapath for increasing resolution in a capacitive fingerprint sensor chip von Ojha, M.M., Anand, A.K., Visweswaran, G.S., Nagchoudhuri, D.

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First and higher order operator based fractional order differentiator and integrator models von Varshney, P., Gupta, M., Visweswaran, G.S.

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A low-power ternary content addressable memory (TCAM) with segmented and non-segmented matchlines von Sultan, M., Siddiqui, M., Sonika, Visweswaran, G.S.

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Texture Filter Memory - a power-efficient and scalable texture memory architecture for mobile graphics processors von Silpa, B.V.N., Patney, A., Krishna, T., Panda, P.R., Visweswaran, G.S.

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