A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure von Agarwala, Sanjive, Rajagopal, Arjun, Hill, Anthony, Joshi, Mayur, Mullinnix, Steven, Anderson, Timothy, Damodaran, Raguram, Nardini, Lewis, Wiley, Paul, Groves, Peter, Apostol, John, Gill, Michael, Flores, Jose, Chachad, Abhijeet, Hales, Alan, Chirca, Kai, Panda, Krishna, Venkatasubramanian, Rama, Eyres, Patrick, Velamuri, Rajasekhar, Rajaram, Anand, Krishnan, Manjeri, Nelson, Johnathan, Frade, Jose, Rahman, Mujibur, Mahmood, Nuruddin, Narasimha, Usha, Sinha, Snehamay, Krishnan, Sridhar, Webster, William, Bui, Duc, Moharil, Shriram, Common, Neil, Nair, Rejitha, Ramanujam, Rajesh, Frade, Jose, Ryan, Monica

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A multi-queue flexible buffer manager architecture von Velamuri, R., Landsberg, P.J., Zukowski, C.A.

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