Boron diffusion and penetration in ultrathin oxide with poly-Si gate von Min Cao, Vande Voorde, P., Cox, M., Greene, W.

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MOS C-V characterization of ultrathin gate oxide thickness (1.3-1.8 nm) von Chang-Hoon Choi, Jung-Suk Goo, Tae-Young Oh, Zhiping Yu, Dutton, R.W., Bayoumi, A., Min Cao, Voorde, P.V., Vook, D., Diaz, C.H.

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The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs von Cheng, B., Cao, M., Rao, R., Inani, A., Vande Voorde, P., Greene, W.M., Stork, J.M.C., Zhiping Yu, Zeitzoff, P.M., Woo, J.C.S.

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0.18-μm fully-depleted silicon-on-insulator MOSFET's von Min Cao, Kamins, T., Voorde, P.V., Diaz, C., Greene, W.

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Method and apparatus for analog floating gate memory cell von Sandhu, Bal S, Voorde, Paul Vande, Wu, Chang-Xian

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METHOD AND APPARATUS FOR ANALOG FLOATING GATE MEMORY CELL von Sandhu, Bal S, Voorde, Paul Vande, Wu, Chang-Xian

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METHOD AND APPARATUS FOR ANALOG FLOATING GATE MEMORY CELL von Sandhu, Bal S, Voorde, Paul Vande, Wu, Chang-Xian

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Design considerations of high-κ gate dielectrics for sub-0.1-μm MOSFET's von Cheng, B., Cao, M., Vande Voorde, P., Greene, W., Stork, H., Yu, Z., Woo, J.C.S.

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Floating-gate memory device and method of forming floating-gate memory cell thereof von SANDHU, BAL S, VOORDE, PAUL VANDE, WU, CHANG-XIAN

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Method and apparatus for analog floating-gate memory cell von SANDHU, BAL S, VOORDE, PAUL VANDE, WU, CHANG-XIAN

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Apparatus for analog floating-gate memory cell von SANDHU, BAL S, VOORDE, PAUL VANDE, WU, CHANG-XIAN

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METHOD AND APPARATUS FOR ANALOG FLOATING-GATE MEMORY CELL von VOORDE PAUL VANDE, WU CHANG XIAN, SANDHU BAL S

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FLOATING-GATE MEMORY DEVICE AND METHOD OF FORMING FLOATING-GATE MEMORY CELL THEREOF von VOORDE PAUL VANDE, WU CHANG XIAN, SANDHU BAL S

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Floating-gate memory device and method of forming floating-gate memory cell thereof von SANDHU, BAL S, VOORDE, PAUL VANDE, WU, CHANG-XIAN

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Method and apparatus for analog floating-gate memory cell von SANDHU, BAL S, VOORDE, PAUL VANDE, WU, CHANG-XIAN

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MOSFET scaling into the future von Voorde, Paul Vande

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Semiconductor diffused resistors with optimized temperature dependence von Voorde, Paul Vande, Liu, Chun-Mai

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Semiconductor diffused resistors with optimized temperature dependence von VOORDE PAUL VANDE, LIU CHUN-MAI

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Method and apparatus for building up large scale on chip de-coupling capacitor on standard CMOS/SOI technology von Ku, Joseph W, Voorde, Paul Vande

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Semiconductor diffused resistors with optimized temperature dependence von Vande Voorde, Paul, Liu, Chun-Mai

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