Structural Decision Diagrams in Digital Test: Theory and Applications von Ubar, Raimund, Raik, Jaan, Jenihhin, Maksim, Jutman, Artur

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High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors von Oyeniran, Adeboye Stephen, Ubar, Raimund, Jenihhin, Maksim, Raik, Jaan

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Centre for Integrated Electronic Systems and Biomedical Engineering-CEBE von Ubar, R

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Software-based self-test generation for microprocessors with high-level decision diagrams von Jasnetski, Artjom, Ubar, Raimund, Tsertov, Anton, Brik, Marina

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Environment for the analysis of functional self-test quality in digital systems von Ubar, Raimund, Kostin, Sergei, Kruus, Helena, Aarna, Margit, Devadze, Sergei

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Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs von Jürimägi, Lembit, Ubar, Raimund, Jenihhin, Maksim, Raik, Jaan

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Hierarchical Physical Defect Reasoning in Digital Circuits von Kostin, S, Ubar, R, Raik, J, Brik, M

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Fast identification of true critical paths in sequential circuits von Ubar, Raimund, Kostin, Sergei, Jenihhin, Maksim, Raik, Jaan, Jürimägi, Lembit

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Application of high-level Decision Diagrams for simulation-based Verification Tasks von Jenihhin, M, Raik, J, Chepurov, A, Ubar, R

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Canonical Representations of high-level Decision Diagrams von Karputkin, A, Ubar, R, Raik, J, Tombak, M

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Test Time Minimization for Hybrid BIST of Core-Based Systems von Jervan, Gert, Eles, Petru, Peng, Zebo, Ubar, Raimund, Jenihhin, Maksim

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Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systems von Ubar, Raimund

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Transition delay fault simulation with parallel critical path back-tracing and 7-valued algebra von Kõusaar, Jaak, Ubar, Raimund, Devadze, Sergei, Raik, Jaan

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Modeling and simulation of circuits with shared structurally synthesized BDDs von Ubar, Raimund, Jürimägi, Lembit, Raik, Jaan, Viies, Vladimir

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Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits von Jenihhin, Maksim, Squillero, Giovanni, Copetti, Thiago Santos, Tihhomirov, Valentin, Kostin, Sergei, Gaudesi, Marco, Vargas, Fabian, Raik, Jaan, Sonza Reorda, Matteo, Bolzani Poehls, Leticia, Ubar, Raimund, Medeiros, Guilherme Cardoso

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Functional self-test of high-performance pipe-lined signal processing architectures von Gorev, Maksim, Ubar, Raimund, Ellervee, Peeter, Devadze, Sergei, Raik, Jaan, Min, Mart

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Software-based self-test generation for microprocessors with high-level decision diagrams/Korgtasemega otsustusdiagrammidel pohinev testprogrammide suntees mikroprotsessoritele von Jasnetski, Artjom, Ubar, Raimund, Tsertov, Anton, Brik, Marina

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Automated design error debug using high-level decision diagrams and mutation operators von Raik, Jaan, Repinski, Urmas, Chepurov, Anton, Hantson, Hanno, Ubar, Raimund, Jenihhin, Maksim

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Parallel X-fault simulation with critical path tracing technique von Ubar, Raimund, Devadze, Sergei, Raik, Jaan, Jutman, Artur

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Embedded fault diagnosis in digital systems with BIST von Ubar, Raimund, Kostin, Sergei, Raik, Jaan

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