Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction von Natsui, Masanori, Suzuki, Daisuke, Sakimura, Noboru, Nebashi, Ryusuke, Tsuji, Yukihide, Morioka, Ayuka, Sugibayashi, Tadahiko, Miura, Sadahiko, Honjo, Hiroaki, Kinoshita, Keizo, Ikeda, Shoji, Endoh, Tetsuo, Ohno, Hideo, Hanyu, Takahiro

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Small angle x-ray scattering (SAXS) and Q-space weighting filter for ×3 CD-extraction accuracy improvement von Tsuji, Yukihide, Kim, Doyun, Yoo, Gwangsu, Hwang, ByungHyun, Kim, Kwanghoon, Lee, Donhwan, Sasai, Yoshinori, Yi, Shinwook, Jeong, Jaehoon, Ihm, Dongchul, Jun, ChungSam, Kim, Dae Sin

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10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications von Sakimura, Noboru, Tsuji, Yukihide, Nebashi, Ryusuke, Honjo, Hiroaki, Morioka, Ayuka, Ishihara, Kunihiko, Kinoshita, Keizo, Fukami, Shunsuke, Miura, Sadahiko, Kasai, Naoki, Endoh, Tetsuo, Ohno, Hideo, Hanyu, Takahiro, Sugibayashi, Tadahiko

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NanoBridge-Based FPGA in High-Temperature Environments von Miyamura, Makoto, Sakamoto, Toshitsugu, Xu Bai, Tsuji, Yukihide, Morioka, Ayuka, Nebashi, Ryusuke, Tada, Munehiro, Banno, Naoki, Okamoto, Koichiro, Iguchi, Noriyuki, Hada, Hiromitsu, Sugibayashi, Tadahiko, Nagamatsu, Yuya, Ookubo, Soichi, Shirai, Takuma, Sugai, Fumihito, Inaba, Masayuki

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Area-efficient nonvolatile carry chain based on pass-transistor/atom-switch hybrid logic von Bai, Xu, Tsuji, Yukihide, Sakamoto, Toshitsugu, Morioka, Ayuka, Miyamura, Makoto, Tada, Munehiro, Banno, Naoki, Okamoto, Koichiro, Iguchi, Noriyuki, Hada, Hiromitsu

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Architecture optimization of nanobridge-based field-programmable gate array and its evaluation von Bai, Xu, Sakamoto, Toshitsugu, Tsuji, Yukihide, Miyamura, Makoto, Morioka, Ayuka, Nebashi, Ryusuke, Tada, Munehiro, Banno, Naoki, Okamoto, Koichiro, Iguchi, Noriyuki, Hada, Hiromitsu, Sugibayashi, Tadahiko

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High-speed simulator including accurate MTJ models for spintronics integrated circuit design von Sakimura, N., Nebashi, R., Tsuji, Y., Honjo, H., Sugibayashi, T., Koike, H., Ohsawa, T., Fukami, S., Hanyu, T., Ohno, H., Endoh, T.

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Low-power embedded read-only memory using atom switch and silicon-on-thin-buried-oxide transistor von Sakamoto, Toshitsugu, Tada, Munehiro, Tsuji, Yukihide, Makiyama, Hideki, Hasegawa, Takumi, Yamamoto, Yoshiki, Okanishi, Shinobu, Banno, Naoki, Miyamura, Makoto, Okamoto, Koichiro, Iguchi, Noriyuki, Ogasahara, Yasuhiro, Oda, Hidekazu, Kamohara, Shiro, Yamagata, Yasushi, Sugii, Nobuyuki, Hada, Hiromitsu

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Lateral Profile of Trapped Charges in Split-Gate SONOS Memory von Tsuji, Y., Terai, M., Fujieda, S., Syo, T., Saito, T., Ando, K.

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Two-dimensional electrons at a cleaved semiconductor surface: Observation of the quantum Hall effect von Tsuji, Yukihide, Mochizuki, Toshimitsu, Okamoto, Tohru

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Small angle x-ray scattering (SAXS) and Q-space weighting filter for x3 CD-extraction accuracy improvement von Tsuji, Yukihide, Kim, Doyun, Yoo, Gwangsu, Hwang, ByungHyun, Kim, Kwanghoon, Lee, Donhwan, Sasai, Yoshinori, Yi, Shinwook, Jeong, Jaehoon, Ihm, Dongchul, Jun, ChungSam, Kim, Dae Sin

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Material Stack Design With High Tolerance to Process-Induced Damage in Domain Wall Motion Device von Honjo, Hiroaki, Fukami, Shunsuke, Ishihara, Kunihiko, Kinoshita, Keizo, Tsuji, Yukihide, Morioka, Ayuka, Nebashi, Ryusuke, Tokutome, Keiichi, Sakimura, Noboru, Murahata, Michio, Miura, Sadahiko, Sugibayashi, Tadahiko, Kasai, Naoki, Ohno, Hideo

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A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM von Sakamoto, Toshitsugu, Tsuji, Yukihide, Tada, Munehiro, Makiyama, Hideki, Hasegawa, Takumi, Yamamoto, Yoshiki, Okanishi, Shinobu, Maekawa, Keiichi, Banno, Naoki, Miyamura, Makoto, Okamoto, Koichiro, Iguchi, Noriyuki, Oda, Hidekazu, Kamohara, Shiro, Yamagata, Yasushi, Sugii, Nobuyuki, Hada, Hiromitsu, Ogasahara, Yasuhiro

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Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating von Natsui, M., Suzuki, D., Sakimura, N., Nebashi, R., Tsuji, Y., Morioka, A., Sugibayashi, T., Miura, S., Honjo, H., Kinoshita, K., Ikeda, S., Endoh, T., Ohno, H., Hanyu, T.

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Observation of the quantum Hall effect in cleaved InAs surfaces von Tsuji, Yukihide, Mochizuki, Toshimitsu, Okamoto, Tohru

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Trapped-Hole-Enhanced Erase-Level Shift by FN-Stress Disturb in Sub-90-nm-Node Embedded SONOS Memory von Terai, M., Tsuji, Y., Kotsuji, S., Fujieda, S., Ando, K.

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METHOD OF SEMICONDUCTOR PROCESS SIMULATION von LEE, Yuntae, TSUJI, Yukihide, YI, Shinwook, KOTAKEMORI, Hisashi

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Magnetotransport of Two-dimensional Electrons at In-situ Cleaved InAs Surfaces von Mochizuki, Toshimitsu, Tsuji, Yukihide, Hio, Masayuki, Okamoto, Tohru

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Reconfigurable circuit von Bai, Xu, Tsuji, Yukihide

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Subband structure and magneto-conductivity of InAs-MIS inversion layers von Tsuji, Yukihide, Okamoto, Tohru

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