Bottom-Up Engineering of Subnanometer Copper Diffusion Barriers Using NH2-Derived Self-Assembled Monolayers von Caro, Arantxa Maestre, Armini, Silvia, Richard, Olivier, Maes, Guido, Borghs, Gustaaf, Whelan, Caroline M., Travaly, Youssef

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Characterization and optimization of porogen-based PECVD deposited extreme low- k materials as a function of UV-cure time von Verdonck, Patrick, De Roest, David, Kaneko, Shinya, Caluwaerts, Rudy, Tsuji, Naoto, Matsushita, Kiyohiro, Kemeling, Nathan, Travaly, Youssef, Sprey, Hessel, Schaekers, Marc, Beyer, Gerald

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On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing von Civale, Yann, Croes, Kristof, Miyamori, Yuichi, Velenis, Dimitrios, Redolfi, Augusto, Thangaraju, Sarasvathi, Ammel, Annemie Van, Cherman, Vladimir, Plas, Geert Van der, Cockburn, Andrew, Gravey, Virginie, Kumar, Nirajan, Cao, Zhitao, Travaly, Youssef, Tőkei, Zsolt, Beyne, Eric, Swinnen, Bart

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Design Issues and Considerations for Low-Cost 3-D TSV IC Technology von Van der Plas, G, Limaye, P, Loi, I, Mercha, A, Oprins, H, Torregiani, C, Thijs, S, Linten, D, Stucchi, M, Katti, G, Velenis, D, Cherman, V, Vandevelde, B, Simons, V, De Wolf, I, Labie, R, Perry, D, Bronckers, S, Minas, N, Cupac, M, Ruythooren, W, Van Olmen, J, Phommahaxay, A, de Potter de ten Broeck, M, Opdebeeck, A, Rakowski, M, De Wachter, B, Dehan, M, Nelis, M, Agarwal, R, Pullini, A, Angiolini, F, Benini, L, Dehaene, W, Travaly, Y, Beyne, E, Marchal, P

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Preface von Travaly, Youssef, Detavernier, Christophe

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On a More Accurate Assessment of Scaled Copper/Low-k Interconnects Performance von Travaly, Y., Mandeep, B., Carbonell, L., Tokei, Z., Van Olmen, J., Iacopi, F., Van Hove, M., Stucchi, M., Maex, K.

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Conference organization von Travaly, Youssef H.

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The 2010 International workshop on Materials for Advanced Metallization - MAM 2010 von TRAVALY, Youssef, DETAVERNIER, Christophe

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Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applications von Jourdain, A., Buisson, T., Phommahaxay, A., Redolfi, A., Thangaraju, S., Travaly, Y., Beyne, E., Swinnen, B.

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3-D Wafer-Level Packaging Die Stacking Using Spin-on-Dielectric Polymer Liner Through-Silicon Vias von Civale, Y, Tezcan, D S, Philipsen, H G G, Duval, F F C, Jaenen, P, Travaly, Y, Soussan, P, Swinnen, B, Beyne, E

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Bottom‐Up Engineering of Subnanometer Copper Diffusion Barriers Using NH 2 ‐Derived Self‐Assembled Monolayers von Caro, Arantxa Maestre, Armini, Silvia, Richard, Olivier, Maes, Guido, Borghs, Gustaaf, Whelan, Caroline M., Travaly, Youssef

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Design issues and considerations for low-cost 3D TSV IC technology von Van der Plas, G., Limaye, P., Mercha, A., Oprins, H., Torregiani, C., Thijs, S., Linten, D., Stucchi, M., Guruprasad, K., Velenis, D., Shinichi, D., Cherman, V., Vandevelde, B., Simons, V., De Wolf, I., Labie, R., Perry, D., Bronckers, S., Minas, N., Cupac, M., Ruythooren, W., Van Olmen, J., Phommahaxay, A., de Potter de ten Broeck, M., Opdebeeck, A., Rakowski, M., De Wachter, B., Dehan, M., Nelis, M., Agarwal, R., Dehaene, W., Travaly, Y., Marchal, P., Beyne, E.

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ESH Friendly Solvent for Stripping Positive and Negative Photoresists in 3D-Wafer Level Packaging and 3D-Stacked IC Applications von Nolmans, Philip, Suhard, Samuel, Civale, Yann, Sabuncuoglu Tezcan, Deniz, Claes, Martine, Travaly, Youssef

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Lateral solvent diffusion characterization of low k dielectric plasma damage and ALD barrier film closure von Abell, Thomas, Schuhmacher, Jorg, Tokei, Zsolt, Travaly, Youssef, Maex, Karen

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Cleaning Requirement in the Thinning Module for 3D-Stacked IC (3D-SIC) Integration von Zhao, Ming, Laermans, Patrick, de Strycker, Steven, Travaly, Youssef, Struyf, Herbert, Verbinnen, Greet, Claes, Martine, Leunissen, Leonardus, Wostyn, Kurt, Cui, Hu Shan, Jourdain, Anne

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Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions von Van der Plas, G, Thijs, S, Linten, D, Katti, G, Limaye, P, Mercha, A, Stucchi, M, Oprins, H, Vandevelde, B, Minas, N, Cupac, M, Dehan, M, Nelis, M, Agarwal, R, Dehaene, W, Travaly, Y, Beyne, E, Marchal, P

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Implementation of Atomic Layer Deposition in Advanced Semiconductor Processes von Schaekers, Marc, Van Ammel, Annemie, Travaly, Youssef, Delabie, Annelies, Martin Hoyas, Ana, Zhao, Chao

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Microlithographically patterned glass surfaces for directing neuronal cell outgrowth: characterization by X-ray photoelectron spectroscopy von Schmalenberg, Kristine, Dukovic, Gordana, Travaly, Youssef, Thompson, Deanna, Buettner, Helen, Uhrich, Kathryn

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Electrical evaluation of 130-nm MOSFETs with TSV proximity in 3D-SIC structure von Yu Yang, Katti, Guruprasad, Labie, Riet, Travaly, Youssef, Verlinden, Bert, De Wolf, Ingrid

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300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications von Jourdain, A, Buisson, T, Phommahaxay, A, Privett, M, Wallace, D, Sood, S, Bisson, P, Beyne, E, Travaly, Y, Swinnen, B

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