A hierarchical watchdog mechanism for systemic fault awareness on distributed systems von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Lo Cicero, Francesca, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Geurts, Werner, Goossens, Gert, Lo Cicero, Francesca, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms von Paolucci, Pier Stanislao, Biagioni, Andrea, Murillo, Luis Gabriel, Rousseau, Frédéric, Schor, Lars, Tosoratto, Laura, Bacivarov, Iuliana, Buecs, Robert L., Deschamps, Clément, El-Antably, Ashraf, Ammendola, Roberto, Fournel, Nicolas, Frezza, Ottorino, Leupers, Rainer, Lo Cicero, Francesca, Lonardo, Alessandro, Martinelli, Michele, Pastorelli, Elena, Rai, Devendra, Rossetti, Davide, Simula, Francesco, Thiele, Lothar, Vicini, Piero, Weinstock, Jan H.

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legaSCi: Legacy SystemC Model Integration into Parallel Simulators von Schumacher, Christoph, Weinstock, Jan Henrik, Leupers, Rainer, Ascheid, Gerd, Tosoratto, Laura, Lonardo, Alessandro, Petras, Dietmar, Hoffmann, Andreas

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A multi-port 10GbE PCIe NIC featuring UDP offload and GPUDirect capabilities von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Lamanna, Gianluca, Cicero, Francesca Lo, Lonardo, Alessandro, Martinelli, Michele, Paolucci, Pier Stanislao, Pastorelli, Elena, Pontisso, Luca, Rossetti, Davide, Simula, Francesco, Sozzi, Marco, Tosoratto, Laura, Vicini, Piero

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Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Paolucci, Pier Stanislao, Lonardo, Alessandro, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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NaNet: a low-latency NIC enabling GPU-based, real-time low level trigger systems von Ammendola, Roberto, Biagioni, Andrea, Fantechi, Riccardo, Frezza, Ottorino, Lamanna, Gianluca, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier Stanislao, Pantaleo, Felice, Piandani, Roberto, Pontisso, Luca, Rossetti, Davide, Simula, Francesco, Sozzi, Marco, Tosoratto, Laura, Vicini, Piero

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A 34 Gbps data transmission system with FPGAs embedded transceivers and QSFP+ modules von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier, Rossetti, Davide, Saiamon, Andrea, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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QUonG: A GPU-based HPC System Dedicated to LQCD Computing von Ammendola, R., Biagioni, A., Frezza, O., Lo Cicero, Francesca, Lonardo, A., Paolucci, P. S., Rossetti, D., Simula, F., Tosoratto, L., Vicini, P.

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Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Francesca Lo Cicero, Paolucci, Pier Stanislao, Lonardo, Alessandro, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodi... von Paolucci, Pier Stanislao, Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Pastorelli, Elena, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes von Paolucci, Pier Stanislao, Bacivarov, Iuliana, Rai, Devendra, Schor, Lars, Thiele, Lothar, Yang, Hoeseok, Pastorelli, Elena, Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012... von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Geurts, Werner, Goossens, Gert, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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'Mutual Watch-dog Networking': Distributed Awareness of Faults and Critical Events in Petascale/Exascale systems von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems von Ammendola, Roberto, Biagioni, Andrea, Fantechi, Riccardo, Frezza, Ottorino, Lamanna, Gianluca, Francesca Lo Cicero, Lonardo, Alessandro, Paolucci, Pier Stanislao, Pantaleo, Felice, Piandani, Roberto, Pontisso, Luca, Rossetti, Davide, Simula, Francesco, Sozzi, Marco, Tosoratto, Laura, Vicini, Piero

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GPU peer-to-peer techniques applied to a cluster interconnect von Ammendola, Roberto, Bernaschi, Massimo, Biagioni, Andrea, Bisson, Mauro, Fatica, Massimiliano, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Mastrostefano, Enrico, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture von Biagioni, Andrea, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier Stanislao, Perra, Mersia, Rossetti, Davide, Sidore, Carlo, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodi... von Paolucci, Pier Stanislao, Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Francesca Lo Cicero, Lonardo, Alessandro, Pastorelli, Elena, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Francesca Lo Cicero, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Salamon, Andrea, Salina, Gaetano, Simula, Francesco, Tosoratto, Laura, Vicini, Piero

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APEnet+: a 3D toroidal network enabling Petaflops scale Lattice QCD simulations on commodity clusters von Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Cicero, Francesca Lo, Lonardo, Alessandro, Paolucci, Pier, Petronzio, Roberto, Rossetti, Davide, Salamon, Andrea, Salina, Gaetano, Simula, Francesco, Tantalo, Nazario, Tosoratto, Laura, Vicini, Piero

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