Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST von Omana, Martin, Rossi, Daniele, Fuzzi, Filippo, Metra, Cecilia, Tirumurti, Chandrasekharan Chandra, Galivanche, Rajesh

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On the Impact of Performance Faults in Modern Microprocessors von Karimi, Naghmeh, Maniatakos, Michail, Tirumurti, Chandrasekharan (Chandra), Makris, Yiorgos

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Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST von Omaña, Martin, Rossi, Daniele, Beniamino, Edda, Metra, Cecilia, Tirumurti, Chandrasekharan, Galivanche, Rajesh

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Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller von Maniatakos, M., Karimi, N., Tirumurti, C., Jas, A., Makris, Y.

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Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors von Maniatakos, M., Tirumurti, C., Galivanche, R., Makris, Y.

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Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor von Karimi, N., Maniatakos, M., Jas, A., Tirumurti, C., Makris, Y.

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