Hardware/Software Codesign: The Past, the Present, and Predicting the Future von Teich, Jürgen

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Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS von Deprettere, Ed F, Vassiliadis, Stamatis

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On-Device Training of Fully Quantized Deep Neural Networks on Cortex-M Microcontrollers von Deutel, Mark, Hannig, Frank, Mutschler, Christopher, Teich, Jurgen

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Modeling and Simulation of Invasive Applications and Architectures von Roloff, Sascha, Hannig, Frank, Teich, Jürgen

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Invasive Computing for Mapping Parallel Programs to Many-Core Architectures von Weichslgartner, Andreas, Wildermann, Stefan, Glaß, Michael, Teich, Jürgen

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Exploring Multi-Reader Buffers and Channel Placement during Dataflow Network Mapping to Heterogeneous Many-core Systems von Letras, Martin, Falk, Joachim, Teich, Jurgen

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Power Density-Aware Resource Management for Heterogeneous Tiled Multicores von Khdr, Heba, Pagani, Santiago, Sousa, Ericles, Lari, Vahid, Pathania, Anuj, Hannig, Frank, Shafique, Muhammad, Teich, Jurgen, Henkel, Jorg

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Symbolic Parallelization of Nested Loop Programs von Tanase, Alexandru-Petru, Hannig, Frank, Teich, Jürgen

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Symmetry-Eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures von Schwarzer, Tobias, Weichslgartner, Andreas, Glass, Michael, Wildermann, Stefan, Brand, Peter, Teich, Jurgen

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Predictable MPSoC execution of real‐time control applications using invasive computing von Brand, Marcel, Witterauf, Michael, Sousa, Éricles, Tanase, Alexandru, Hannig, Frank, Teich, Jürgen

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HipaccVX: wedding of OpenVX and DSL-based code generation von Özkan, M. Akif, Ok, Burak, Qiao, Bo, Teich, Jürgen, Hannig, Frank

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Handbook of Hardware/Software Codesign von Ha, Soonhoi, Teich, Jürgen

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Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures von Khosravi, Faramarz, Glas, Michael, Teich, Jurgen

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Task Migration Policy for Thermal-Aware Dynamic Performance Optimization in Many-Core Systems von Pourmohseni, Behnaz, Wildermann, Stefan, Smirnov, Fedor, Meyer, Paul E., Teich, Jurgen

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Power Signature Watermarking of IP Cores for FPGAs von Ziener, Daniel, Teich, Jürgen

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SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications von Keinert, Joachim, Streubūhr, Martin, Schlichter, Thomas, Falk, Joachim, Gladigau, Jens, Haubelt, Christian, Teich, Jūrgen, Meredith, Michael

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Architecture of Computing Systems - ARCS 2016: 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings von Hannig, Frank, Cardoso, João M. P, Pionteck, Thilo, Fey, Dietmar, Schröder-Preikschat, Wolfgang, Teich, Jürgen

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The HighPerMeshes framework for numerical algorithms on unstructured grids von Alhaddad, Samer, Förstner, Jens, Groth, Stefan, Grünewald, Daniel, Grynko, Yevgen, Hannig, Frank, Kenter, Tobias, Pfreundt, Franz‐Josef, Plessl, Christian, Schotte, Merlind, Steinke, Thomas, Teich, Jürgen, Weiser, Martin, Wende, Florian

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Semi-Automatic Locating of Cryptographic Operations in Side-Channel Traces von Trautmann, Jens, Beckers, Arthur, Wouters, Lennert, Wildermann, Stefan, Verbauwhede, Ingrid, Teich, Jürgen

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The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer von Majer Mateusz, Teich Jürgen, Ahmadinia Ali, Bobda Christophe

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