Decoupled dynamic ternary content addressable memories von Delgado-Frias, J.G., Nyathi, J., Tatapudi, S.B.

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A mesochronous pipelining scheme for high-performance digital systems von Tatapudi, S.B., Delgado-Frias, J.G.

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A Reduced Clock Delay Approach for High Performance Mesochronous Pipeline von Tatapudi, S.B., Delgado-Frias, J.G.

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Designing pipelined systems with a clock period approaching pipeline register delay von Tatapudi, S.B., Delgado-Frias, J.G.

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A high performance hybrid wave-pipelined multiplier von Tatapudi, S.B., Delgado-Frias, J.G.

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