Energy awareness and uncertainty in microarchitecture-level design von Marculescu, D., Talpes, E.

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Toward a multiple clock/voltage island design style for power-aware processors von Talpes, E., Marculescu, D.

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Execution cache-based microarchitecture for power-efficient superscalar processors von Talpes, E., Marculescu, D.

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Variability and energy awareness: a microarchitecture-level perspective von Marculescu, Diana, Talpes, Emil

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Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines von Talpes, Emil, Marculescu, Diana

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A critical analysis of application-adaptive multiple clock processors von Talpes, E., Marculescu, D.

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Power reduction through work reuse [superscalar processor microarchitecture] von Talpes, E., Marculescu, D.

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Mixed-clock issue queue design for energy aware, high-performance cores von Rapaka, V.S.P., Talpes, E., Marculescu, D.

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A critical analysis of application-adaptive multiple clock processors von Talpes, Emil, Marculescu, Diana

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Power reduction through work reuse von Talpes, Emil, Marculescu, Diana

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Mass balance of the Greenland Ice Sheet from 1992 to 2018 von Shepherd, Andrew, Ivins, Erik, Rignot, Eric, Smith, Ben, van den Broeke, Michiel, Velicogna, Isabella, Whitehouse, Pippa

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Mass balance of the Antarctic Ice Sheet from 1992 to 2017 von Shepherd, Andrew, Ivins, Erik, Rignot, Eric, Smith, Ben, van den Broeke, Michiel, Velicogna, Isabella, Whitehouse, Pippa, Briggs, Kate, Joughin, Ian, Krinner, Gerhard, Nowicki, Sophie, Payne, Tony, Scambos, Ted, Schlegel, Nicole, Geruo, A, Agosta, Cécile, Ahlstrøm, Andreas, Babonis, Greg, Barletta, Valentina, Blazquez, Alejandro, Bonin, Jennifer, Csatho, Beata, Cullather, Richard, Felikson, Denis, Fettweis, Xavier, sberg, Rene, Gallee, Hubert, Gardner, Alex, Gilbert, Lin, Groh, Andreas, Gunter, Brian, Hanna, Edward, Harig, Christopher, Helm, Veit, Horvath, Alexander, Horwath, Martin, Khan, Shfaqat, Kjeldsen, Kristian K, Konrad, Hannes, Langen, Peter, Lecavalier, Benoit, Loomis, Bryant, Luthcke, Scott, McMillan, Malcolm, Melini, Daniele, Mernild, Sebastian, Mohajerani, Yara, Moore, Philip, Mouginot, Jeremie, Moyano, Gorka, Muir, Alan, Nagler, Thomas, Nield, Grace, Nilsson, Johan, Noel, Brice, Otosaka, Ines, Pattle, Mark E, Peltier, W Richard, Pie, Nadege, Rietbroek, Roelof, Rott, Helmut, Sandberg-Sørensen, Louise, Sasgen, Ingo, Save, Himanshu, Scheuchl, Bernd, Schrama, Ernst, Schröder, Ludwig, Seo, Ki-Weon, Simonsen, Sebastian, Slater, Tom, Spada, Giorgio, Sutterley, Tyler, Talpe, Matthieu, Tarasov, Lev, van de Berg, Willem Jan, van der Wal, Wouter, vanWessem, Melchior, Vishwakarma, Bramha Dutt, Wiese, David, Wouters, Bert

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PROCESSOR AND METHODS FOR FLOATING POINT REGISTER ALIASING von ESTLICK, Michael, WEIDNER, Robert E, FLEISCHMAN, Jay E, MCGOWEN, Richard, TALPES, Emil, SEDMAK, Michael C

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Flush operations in a processor von TALPES EMIL, DASSARMA DEBJIT, FLEISCHMAN JAY E

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VECTOR COMPUTATIONAL UNIT von TALPES Emil, BANNON Peter Joseph, DAS SARMA Debjit

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ACCELERATED MATHEMATICAL ENGINE von TALPES Emil, HURD Kevin Altair, BANNON Peter Joseph

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PROCESSOR AND METHODS FOR FLOATING POINT REGISTER ALIASING von ESTLICK, Michael, WEIDNER, Robert E, FLEISCHMAN, Jay E, MCGOWEN, Richard, TALPES, Emil, SEDMAK, Michael C

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FLUSH OPERATIONS IN A PROCESSOR von TALPES EMIL, DASSARMA DEBJIT, FLEISCHMAN JAY E

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PROCESSOR AND METHODS FOR FLOATING POINT REGISTER ALIASING von FLEISCHMAN, JAY E, SEDMAK, MICHAEL C, MCGOWEN, RICHARD, WEIDNER, ROBERT E, ESTLICK, MICHAEL, TALPES, EMIL

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PROCESSOR AND METHODS FOR FLOATING POINT REGISTER ALIASING von FLEISCHMAN, JAY E, SEDMAK, MICHAEL C, MCGOWEN, RICHARD, WEIDNER, ROBERT E, ESTLICK, MICHAEL, TALPES, EMIL

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