An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator von Tabrizi, Nozar, Bagherzadeh, Nader

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Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture von Sanchez-Elez, Marcos, Du, Haitao, Tabrizi, Nozar, Long, Yun, Bagherzadeh, Nader, Fernandez, Milagros

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Tabular method for guard strengthening, symmetrization, and operator reduction for Martin's asynchronous design methodology von Tabrizi, Nozar, Liebelt, Michael J, Eshraghian, Kamran

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A tabular method for guard strengthening, symmetrization, and operator reduction for Martin's asynchronous design methodology von Tabrizi, N., Liebelt, M.J., Eshraghian, K.

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A Distributed and Shared Register File for a Multiprocessor-on-Chip to Support Real-Time Applications von Tabrizi, N., Bagherzadeh, N.

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A programmable DSP architecture for wireless communication systems von Kamalizad, A., Tabrizi, N., Bagherzadeh, N., Hatanaka, A.

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Delay hazards in complex gate based speed independent VLSI circuits von Tabrizi, N., Liebelt, M.J., Eshraghian, K.

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