A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio von Pang, Jian, Wu, Rui, Wang, Yun, Dome, Masato, Kato, Hisashi, Huang, Hongye, Tharayil Narayanan, Aravind, Liu, Hanli, Liu, Bangan, Nakamura, Takeshi, Fujimura, Takuya, Kawabuchi, Masaru, Kubozoe, Ryo, Miura, Tsuyoshi, Matsumoto, Daiki, Li, Zheng, Oshima, Naoki, Motoi, Keiichi, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi

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A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator With an FoM of -250 dB von Tharayil Narayanan, Aravind, Katsuragi, Makihiko, Kimura, Kento, Kondo, Satoshi, Tokgoz, Korkut Kaan, Nakata, Kengo, Wei Deng, Okada, Kenichi, Matsuzawa, Akira

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A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance von Pang, Jian, Maki, Shotaro, Kawai, Seitarou, Nagashima, Noriaki, Seo, Yuuki, Dome, Masato, Kato, Hisashi, Katsuragi, Makihiko, Kimura, Kento, Kondo, Satoshi, Terashima, Yuki, Liu, Hanli, Siriburanon, Teerachot, Tharayil Narayanan, Aravind, Fajri, Nurul, Kaneko, Tohru, Yoshioka, Toru, Liu, Bangan, Wang, Yun, Wu, Rui, Li, Ning, Tokgoz, Korkut Kaan, Miyahara, Masaya, Shirane, Atsushi, Okada, Kenichi

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A Pulse-Tail-Feedback LC-VCO with 700Hz Flicker Noise Corner and -195dBc FoM von NARAYANAN, Aravind Tharayil, OKADA, Kenichi

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A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock von ZHANG, Haosheng, NARAYANAN, Aravind THARAYIL, HERDIAN, Hans, LIU, Bangan, WU, Rui, SHIRANE, Atsushi, OKADA, Kenichi

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A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR von Pang, Jian, Li, Zheng, Kubozoe, Ryo, Luo, Xueting, Wu, Rui, Wang, Yun, You, Dongwon, Fadila, Ashbir Aviat, Saengchan, Rattanan, Nakamura, Takeshi, Alvin, Joshua, Matsumoto, Daiki, Liu, Bangan, Narayanan, Aravind Tharayil, Qiu, Junjun, Liu, Hanli, Sun, Zheng, Huang, Hongye, Tokgoz, Korkut Kaan, Motoi, Keiichi, Oshima, Naoki, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi

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A 0.4-ps-Jitter −52-dBc-Spur Synthesizable Injection-Locked PLL With Self-Clocked Nonoverlap Update and Slope-Balanced Subsampling BBPD von Liu, Bangan, Ngo, Huy Cu, Nakata, Kengo, Deng, Wei, Zhang, Yuncheng, Qiu, Junjun, Yoshioka, Toru, Emmei, Jun, Pang, Jian, Tharayil Narayanan, Aravind, Zhang, Haosheng, Yang, Dongsheng, Liu, Hanli, Someya, Teruki, Shirane, Atsushi, Okada, Kenichi

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A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration von Liu, Bangan, Zhang, Yuncheng, Qiu, Junjun, Ngo, Huy Cu, Deng, Wei, Nakata, Kengo, Yoshioka, Toru, Emmei, Jun, Pang, Jian, Narayanan, Aravind Tharayil, Zhang, Haosheng, Someya, Teruki, Shirane, Atsushi, Okada, Kenichi

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A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS von Wang, Yun, Liu, Bangan, Wu, Rui, Liu, Hanli, Narayanan, Aravind Tharayil, Pang, Jian, Li, Ning, Yoshioka, Toru, Terashima, Yuki, Zhang, Haosheng, Tang, Dexian, Katsuragi, Makihiko, Lee, Daeyoung, Choi, Sungtae, Okada, Kenichi, Matsuzawa, Akira

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A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS von LIU, Bangan, WANG, Yun, PANG, Jian, ZHANG, Haosheng, YANG, Dongsheng, NARAYANAN, Aravind Tharayil, LEE, Dae Young, CHOI, Sung Tae, WU, Rui, OKADA, Kenichi, MATSUZAWA, Akira

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An AM-PM Noise Mitigation Technique in Class-C VCO von KIMURA, Kento, NARAYANAN, Aravind THARAYIL, OKADA, Kenichi, MATSUZAWA, Akira

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ULPAC: A Miniaturized Ultralow-Power Atomic Clock von Zhang, Haosheng, Okada, Kenichi, Herdian, Hans, Narayanan, Aravind Tharayil, Shirane, Atsushi, Suzuki, Mitsuru, Harasaka, Kazuhiro, Adachi, Kazuhiko, Goka, Shigeyoshi, Yanagimachi, Shinya

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A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI von NARAYANAN, Aravind THARAYIL, DENG, Wei, YANG, Dongsheng, WU, Rui, OKADA, Kenichi, MATSUZAWA, Akira

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High- Q Inductors on Locally Semi-Insulated Si Substrate by Helium-3 Bombardment for RF CMOS Integrated Circuits von Li, Ning, Okada, Kenichi, Inoue, Takeshi, Hirano, Takuichi, Bu, Qinghong, Narayanan, Aravind Tharayil, Siriburanon, Teerachot, Sakane, Hitoshi, Matsuzawa, Akira

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A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI von YANG, Dongsheng, UENO, Tomohiro, DENG, Wei, TERASHIMA, Yuki, NAKATA, Kengo, NARAYANAN, Aravind Tharayil, WU, Rui, OKADA, Kenichi, MATSUZAWA, Akira

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A 0.0055mm super(2) 480 mu W Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI von Yang, Dongsheng, Ueno, Tomohiro, Deng, Wei, Terashima, Yuki, Nakata, Kengo, Narayanan, Aravind Tharayil, Wu, Rui, Okada, Kenichi, Matsuzawa, Akira

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OSCILLATOR MANAGEMENT von PÅHLSSON, Tony, ABDULAZIZ, Mohammed, THARAYIL NARAYANAN, Aravind

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Phase-locked loop von Ek, Staffan, Sundström, Lars, Strandberg, Roland, Tharayil Narayanan, Aravind

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PHASE-LOCKED LOOP von EK, Staffan, THARAYIL NARAYANAN, Aravind, SUNDSTRÖM, Lars, STRANDBERG, Roland

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SYSTEM FOR COMPENSATING THE NON-LINEAR DISTORTION INTRODUCED BY A RADIO POWER AMPLIFIER BASED ON HARMONIC ANALYSIS von DOSHO Shiro, TOKGOZ Korkut Kaan, THARAYIL NARAYANAN Aravind, HAGIHARA Aran, ITO Hiroyuki, BARTELS Jim, MINATI Ludovico

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