Allocation of load instruction(s) to a queue buffer in a processor system based on prediction of an instruction pipeline hazard von Ashcraft Matthew, Thaik Richard W

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HAZARD PREDICTION FOR A GROUP OF MEMORY ACCESS INSTRUCTIONS USING A BUFFER ASSOCIATED WITH BRANCH PREDICTION von ASHCRAFT MATTHEW, THAIK RICHARD W

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ALLOCATION OF LOAD INSTRUCTION(S) TO A QUEUE BUFFER IN A PROCESSOR SYSTEM BASED ON PREDICTION OF AN INSTRUCTION PIPELINE HAZARD von ASHCRAFT MATTHEW, THAIK RICHARD W

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Maintaining memory coherency with a trace cache von Favor, John G, Thaik, Richard W

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Maintaining memory coherency with a trace cache von THAIK RICHARD W, FAVOR JOHN G

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Software hint to specify the preferred branch prediction to use for a branch instruction von Song, Seungyoon Peter, Favor, John Gregory, Thaik, Richard W

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Software hint to specify the preferred branch prediction to use for a branch instruction von THAIK RICHARD W, SONG SEUNGYOON PETER, FAVOR JOHN GREGORY

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Asynchronous processor access to a switch table in a network with isochronous capability von Worsley, Debra J, Werstlein, Michael T, Thaik, Richard W

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Asynchronous processor access to a switch table in a network with isochronous capability von THAIK RICHARD W, WORSLEY DEBRA J, WERSTLEIN MICHAEL T

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Asynchronous processor access to a switch table in a network with isochronous capability von WERSTLEIN, MICHAEL T, THAIK, RICHARD W, WORSLEY, DEBRA J

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Video display system having by-the-line and by-the-pixel mod ification von DAVID LEWIS NEEDLE, TINA L. CARROLL, RICHARD W. THAIK, STEVE C. WASSERMAN, ROBERT JOSEPH MICAL, STEPHEN HARLAND LANDRUM

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VIDEO DISPLAY SYSTEM HAVING BY-THE-LINE AND BY-THE-PIXEL MODIFICATION von THAIK, RICHARD, W, LANDRUM, STEPHEN, HARLAND, WASSERMAN, STEVE, C, NEEDLE, DAVID, LEWIS, CARROLL, TINA, L, MICAL, ROBERT, JOSEPH

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