Physics-Inspired Optimization for Quadratic Unconstrained Problems Using a Digital Annealer von Aramon, Maliheh, Rosenberg, Gili, Valiante, Elisabetta, Miyazawa, Toshiyuki, Tamura, Hirotaka, Katzgraber, Helmut G.

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Efficient Correlation-based Discretization of Continuous Variables for Annealing Machines von Furue, Yuki, Konoshima, Makiko, Tamura, Hirotaka, Ohkubo, Jun

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Replicated Simulated Annealing with a Global-Best Reference for Efficient Hardware Implementation von Konoshima, Makiko, Tamura, Hirotaka, Kabashima, Yoshiyuki

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Optimization via Rejection-Free Partial Neighbor Search von Chen, Sigeng, Rosenthal, Jeffrey S., Dote, Aki, Tamura, Hirotaka, Sheikholeslami, Ali

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Nebula: Network Enhanced Boltzmann Machine With Universal Local Search Architecture von Watanabe, Yasuhiro, Tamura, Hirotaka, Furue, Yuki, Yin, Fang

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Penalty Coefficient Adjustment Technique for Extended Ising Machines von Yin, Fang, Tamura, Hirotaka, Furue, Yuki, Watanabe, Yasuhiro

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Derivation of QUBO Formulations for Sparse Estimation von Yokota, Tomohiro, Konoshima, Makiko, Tamura, Hirotaka, Ohkubo, Jun

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Jump Markov chains and rejection-free Metropolis algorithms von Rosenthal, Jeffrey S., Dote, Aki, Dabiri, Keivan, Tamura, Hirotaka, Chen, Sigeng, Sheikholeslami, Ali

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Digital Annealer: A Dedicated Digital Architecture for Combinatorial Optimization with Multiple Replica Processing von Tamura, Hirotaka

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Quadratic unconstrained binary optimization formulation for rectified-linear-unit-type functions von Sato, Go, Konoshima, Makiko, Ohwa, Takuya, Tamura, Hirotaka, Ohkubo, Jun

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Split capacitor DAC mismatch calibration in successive approximation ADC von Yanfei Chen, Xiaolei Zhu, Tamura, H., Kibune, M., Tomita, Y., Hamada, T., Yoshioka, M., Ishikawa, K., Takayama, T., Ogawa, J., Tsukamoto, S., Kuroda, T.

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Loop Gain Adaptation for Optimum Jitter Tolerance in Digital CDRs von Liang, Joshua, Sheikholeslami, Ali, Tamura, Hirotaka, Ogata, Yuuki, Yamaguchi, Hisakatsu

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Replica Exchange MCMC Hardware With Automatic Temperature Selection and Parallel Trial von Dabiri, Keivan, Malekmohammadi, Mehrdad, Sheikholeslami, Ali, Tamura, Hirotaka

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A Reference-Less Single-Loop Half-Rate Binary CDR von Jalali, Mohammad Sadegh, Sheikholeslami, Ali, Kibune, Masaya, Tamura, Hirotaka

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A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS von Rahman, Wahid, Yoo, Danny, Liang, Joshua, Sheikholeslami, Ali, Tamura, Hirotaka, Shibasaki, Takayuki, Yamaguchi, Hisakatsu

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On-Chip Jitter Measurement Using Jitter Injection in a 28 Gb/s PI-Based CDR von Liang, Joshua, Sheikholeslami, Ali, Tamura, Hirotaka, Yamaguchi, Hisakatsu

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Extended Ising Machine with Additional Non-quadratic Cost Functions von Yin, Fang, Tamura, Hirotaka, Furue, Yuki, Konoshima, Makiko, Kanda, Kouichi, Watanabe, Yasuhiro

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Looking to the Future: Projected Requirements for Wireline Communications Technology von Tamura, Hirotaka

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A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range von TAKATSU, Keita, TAMURA, Hirotaka, YAMAMOTO, Takuji, DOI, Yoshiyasu, KANDA, Koichi, SHIBASAKI, Takayuki, KURODA, Tadahiro

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A Blind Baud-Rate ADC-Based CDR von Ting, Clifford, Liang, Joshua, Sheikholeslami, Ali, Kibune, Masaya, Tamura, Hirotaka

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