A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs von Weiqiang Liu, Liang Lu, O'Neill, Maire, Swartzlander, Earl E.

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Adder and Multiplier Design in Quantum-Dot Cellular Automata von Cho, H., Swartzlander, E.E.

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Adder Designs and Analyses for Quantum-Dot Cellular Automata von Cho, H., Swartzlander, E.E.

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A Fused Floating-Point Four-Term Dot Product Unit von Jongwook Sohn, Swartzlander, Earl E.

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Improved Architectures for a Fused Floating-Point Add-Subtract Unit von Jongwook Sohn, Swartzlander, Earl E.

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QCA Systolic Array Design von Liang Lu, Weiqiang Liu, O'Neill, M., Swartzlander, E. E.

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Are QCA cryptographic circuits resistant to power analysis attack? von Weiqiang Liu, Srivastava, S., Liang Lu, O'Neill, M., Swartzlander, E. E.

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Optimized Memristor-Based Multipliers von Guckert, Lauren, Swartzlander, Earl E.

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Adaptive CORDIC: Using Parallel Angle Recoding to Accelerate Rotations von Rodrigues, T.K., Swartzlander, E.E.

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Design and Analysis of Approximate Redundant Binary Multipliers von Liu, Weiqiang, Cao, Tian, Yin, Peipei, Zhu, Yuying, Wang, Chenghua, Swartzlander, Earl E., Lombardi, Fabrizio

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Priority Tries for IP Address Lookup von Hyesook Lim, Changhoon Yim, Swartzlander, Earl E

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A Goldschmidt Division Method With Faster Than Quadratic Convergence von Inwook Kong, Swartzlander, E E

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Digit-pipelined direct digital frequency synthesis based on differential CORDIC von Chang Yong Kang, Swartzlander, E.E.

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Improved Architectures for a Floating-Point Fused Dot Product Unit von Jongwook Sohn, Swartzlander, E. E.

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Data Compression Device Based on Modified LZ4 Algorithm von Weiqiang Liu, Faqiang Mei, Chenghua Wang, O'Neill, Maire, Swartzlander, Earl E.

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Bridge Floating-Point Fused Multiply-Add Design von Quinnell, E., Swartzlander, E.E., Lemonds, C.

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A Reduced Complexity Wallace Multiplier Reduction von Waters, Ron S, Swartzlander, Earl E

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A Modified Partial Product Generator for Redundant Binary Multipliers von Xiaoping Cui, Weiqiang Liu, Xin Chen, Swartzlander, Earl E., Lombardi, Fabrizio

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A scaled DCT architecture with the CORDIC algorithm von Sungwook Yu, Swartzlander, E.E.

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High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes von Xiaoping Cui, Wenwen Dong, Weiqiang Liu, Swartzlander, Earl E., Lombardi, Fabrizio

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