Visualization and automatic detection of defect distribution in GaN atomic structure from sampling Moiré phase von Wang, Q H, Ri, S, Tsuda, H, Kodera, M, Suguro, K, Miyashita, N

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Visualization and automatic detection of defect distribution in GaN atomic structure from sampling Moiré phase von Wang, Q H, Ri, S, Tsuda, H, Kodera, M, Suguro, K, Miyashita, N

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Self-aligned nickel-mono-silicide technology for high-speed deep submicrometer logic CMOS ULSI von Morimoto, T., Ohguro, T., Momose, S., Iinuma, T., Kunishima, I., Suguro, K., Katakabe, I., Nakajima, H., Tsuchiaki, M., Ono, M., Katsumata, Y., Iwai, H.

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Improvement of threshold voltage deviation in damascene metal gate transistors von Yagishita, A., Saito, T., Nakajima, K., Inumiya, S., Matsuo, K., Shibata, T., Tsunashima, Y., Suguro, K., Arikado, T.

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High performance 35 nm gate length CMOS with NO oxynitride gate dielectric and Ni salicide von Inaba, S., Okano, K., Matsuda, S., Fujiwara, M., Hokazono, A., Adachi, K., Ohuchi, K., Suto, H., Fukui, H., Shimizu, T., Mori, S., Oguma, H., Murakoshi, A., Itani, T., Iinuma, T., Kudo, T., Shibata, H., Taniguchi, S., Takayanagi, M., Azuma, A., Oyamatsu, H., Suguro, K., Katsumata, Y., Toyoshima, Y., Ishiuchi, H.

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High performance damascene metal gate MOSFETs for 0.1 μm regime von Yagishita, A, Saito, T, Nakajima, K, Inumiya, S, Akasaka, Y, Ozawa, Y, Hieda, K, Tsunashima, Y, Suguro, K, Arikado, T, Okumura, K

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Highly reliable CVD-WSi metal gate electrode for nMOSFETs von Nakajima, K., Nakazawa, H., Sekine, K., Matsuo, K., Saito, T., Katata, T., Suguro, K., Tsunashima, Y.

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Improvement of performance deviation and productivity of MOSFETs with gate length below 30 nm by flash lamp annealing von Nishinohara, K.T., Ito, T., Suguro, K.

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Suppression of SiN-induced boron penetration by using SiH-free silicon nitride films formed by tetrachlorosilane and ammonia von Tanaka, M., Saida, S., Mizushima, I., Inoue, F., Kojima, M., Tanaka, T., Nakanishi, T., Suguro, K., Tsunashima, Y.

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Low-resistance ultrashallow extension formed by optimized flash lamp annealing von Ito, T., Suguro, K., Tamura, M., Taniguchi, T., Ushiku, Y., Iinuma, T., Itani, T., Yoshioka, M., Owada, T., Imaoka, Y., Murayama, H., Kusuda, T.

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Dynamic threshold voltage damascene metal gate MOSFET (DT-DMG-MOS) technology for very low voltage operation of under 0.7 V von Yagishita, A., Saito, T., Inuniiya, S., Matsuo, K., Tsunashima, Y., Suguro, K.

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Issues and optimization of millisecond anneal process for 45 nm node and beyond von Adachi, K., Ohuchi, K., Aoki, N., Tsujii, H., Ito, T., Itokawa, H., Matsuo, K., Suguro, K., Honguh, Y., Tamaoki, N., Ishimaru, K., Ishiuchi, H.

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Formation mechanism of ultrathin WSiN barrier layer in a W/WNx/Si system von Nakajima, K., Akasaka, Y., Miyano, K., Takahashi, M., Suehiro, S., Suguro, K.

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Stencil mask ion implantation technology von Shibata, T., Suguro, K., Sugihara, K., Nishihashi, T., Fujiyama, J., Sakurada, Y.

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FinFET: the prospective multi-gate device for future SoC applications von Inaba, S., Okano, K., Izumida, T., Kaneko, A., Kawasaki, H., Yagishita, A., Kanemura, T., Ishida, T., Aoki, N., Ishimaru, K., Suguro, K., Eguchi, K., Tsunashima, Y., Toyoshima, Y., Ishiuchi, H.

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Low-resistivity poly-metal gate electrode durable for high-temperature processing von Akasaka, Y., Suehiro, S., Nakajima, K., Nakasugi, T., Miyano, K., Kasai, K., Oyamatsu, H., Kinugawa, M., Takagi, M.T., Agawa, K., Matsuoka, F., Kakumu, M., Suguro, K.

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Lithographyless ion implantation technology for agile fab von Nishihashi, T., Kashimoto, K., Fujiyama, J., Sakurada, Y., Shibata, T., Suguro, K., Sugihara, K., Okumura, K., Gotou, T., Saji, N., Tsunoda, M.

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Surface Channel Metal Gate Complementary MOS with Light Counter Doping and Single Work Function Gate Electrode von Nishinohara, Kazumi T., Akasaka, Yasushi, Saito, Tomohiro, Yagishita, Atsushi, Murakoshi, Atsushi, Suguro, Kyoichi, Arikado, Tsunetoshi

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10–15 nm Ultrashallow Junction Formation by Flash-Lamp Annealing von Ito, Takayuki, Iinuma, Toshihiko, Murakoshi, Atsushi, Akutsu, Haruko, Suguro, Kyoichi, Arikado, Tsunetoshi, Okumura, Katsuya, Yoshioka, Masaki, Owada, Tatsushi, Imaoka, Yasuhiro, Murayama, Hiromi, Kusuda, Tatsuhumi

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Tungsten/titanium nitride low-resistance interconnections durable for high-temperature processing von NAKASAKI, Y, SUGURO, K, SHIMA, S, KASHIWAGI, M

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