Using Genetic Algorithms for Hardware Core Placement and Mapping in NoC-Based Reconfigurable Systems von Gomes Filho, Jonas, Chau, Wang Jiang, Strum, Marius

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QoSS Hierarchical NoC-Based Architecture for MPSoC Dynamic Protection von Sepulveda, Johanna, Pires, Ricardo, Gogniat, Guy, Chau, Wang Jiang, Strum, Marius

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NoC-Based Protection for SoC Time-Driven Attacks von Sepulveda, Martha Johanna, Diguet, Jean-Philippe, Strum, Marius, Gogniat, Guy

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Burst-Mode Asynchronous Controllers on FPGA von Oliveira, Duarte L., Strum, Marius, Sato, Sandro S.

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A Unified Sequential Equivalence Checking Methodology to Verify RTL Designs with High-Level Functional and Protocol Specification Models von Castro Marquez, Carlos Ivan, Strum, Marius, Chau, Wang Jiang

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NoC-Based Protection for SoC Time-Driven Attacks von Sepulveda, Martha Johanna, Diguet, Jean-Philippe, Strum, Marius, Gogniat, Guy

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Manipulation of Training Sets for Improving Data Mining Coverage-Driven Verification von Romero, Edgar Leonardo, Strum, Marius, Chau, Wang Jiang

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A multi-objective adaptive immune algorithm for multi-application NoC mapping von Sepúlveda, Martha Johanna, Chau, Wang Jiang, Gogniat, Guy, Strum, Marius

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Burst-Mode Asynchronous Controllers on FPGA von Oliveira, Duarte L., Strum, Marius, Sato, Sandro S.

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A multi-objective approach for multi-application NoC mapping von Sepúlveda, J, Strum, M, Wang Jiang Chau, Gogniat, G

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A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling von Castro Márquez, Carlos Iván, Romero Tobar, Edgar Leonardo, Strum, Marius, Chau, Wang Jiang

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QoSS architecture for MPSoC dynamic protection von Sepulveda, Martha Johanna, Gogniat, Guy, Pires, Ricardo, Wang, Jiang Chau, Strum, Marius

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Implementation of QoSS (Quality-of-Security Service) for NoC- Based SoC Protection von Sepúlveda, Johanna, Pires, Ricardo, Strum, Marius, Chau, Wang Jiang

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The Multiple Pairs SMO: A modified SMO algorithm for the acceleration of the SVM training von Hernandez, R.A., Strum, M., Wang Jiang Chau, Gonzalez, J.A.Q.

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Formal equivalence checking between high-level and RTL hardware designs von Castro Marquez, Carlos Ivan, Strum, Marius, Wang Jiang Chau

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Long range dependence in intrachip transaction level traffic von Gonzalez, J., Patino, G., Strum, M., Wang Jiang Chau

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A strategy for mapping reconfigurable cores in NoCs von Gomes Filho, J., Strum, M., Wang Jiang Chau

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PrOCov: Probabilistic output coverage model von Quispe, Joel Ivan Munoz, Strum, Marius, Wang Jiang Chau

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Hierarchical NoC-based security for MP-SoC dynamic protection von Sepulveda, J., Gogniat, G., Pedraza, C., Pires, R., Wang Jiang Chau, Strum, M.

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QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs von Sepulveda, J., Gogniat, G., Pires, R., Pedraza, C., Wang Chau, Strum, M.

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