Online Fault Tolerance for FPGA Logic Blocks von Emmert, J.M., Stroud, C.E., Abramovici, M.

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Online BIST and BIST-based diagnosis of FPGA logic blocks von Abramovici, M., Stroud, C.E., Emmert, J.M.

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BIST-based test and diagnosis of FPGA logic blocks von Abramovici, M., Stroud, C.E.

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FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems von Jie Qin, Stroud, C.E., Dai, F.F.

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Built-In Self-Test of configurable logic blocks in Virtex-5 FPGAs von Dutton, B.F., Stroud, C.E.

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Built-In Self-Test of digital signal processors in Virtex-4 FPGAs von Pulukuri, M.D., Stroud, C.E.

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Soft Core Embedded Processor Based Built-In Self-Test of FPGAs von Dutton, B.F., Stroud, C.E.

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Built-In Self-Test of programmable input/output tiles in Virtex-5 FPGAs von Dutton, B.F., Stroud, C.E.

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Reliability of majority voting based VLSI fault-tolerant circuits von Stroud, C.E.

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Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems von Starr, G.J., Jie Qin, Dutton, B.F., Stroud, C.E., Dai, F.F., Nelson, V.P.

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Roving STARs: an integrated approach to on-line testing, diagnosis, and fault tolerance for FPGAs in adaptive computing systems von Abramovici, M., Emmert, J.M., Stroud, C.E.

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Automated BIST for sequential logic synthesis von Stroud, C.E.

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Bridging fault extraction from physical design data for manufacturing test development von Stroud, C.E., Emmert, J.M., Bailey, J.R., Chhor, K.S., Nikolic, D.

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Yield modeling for majority voting based defect-tolerant VLSI circuits von Stroud, C.E.

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Improving the efficiency of error identification via signature analysis von Stroud, C.E., Damarla, T.R.

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PARVOVIRUS INFECTIONS AND HYPOPLASTIC CRISIS IN SICKLE-CELL ANAEMIA von Pattison, J.R., Jones, S.E., Hodgson, J., Davis, L.R., White, J.M., Stroud, C.E., Murtaza, L.

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An automated BIST approach for general sequential logic synthesis von Stroud, C.E.

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Applying built-in self-test to majority voting fault tolerant circuits von Stroud, C.E., Tannehill, J.K.

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DISTRACTIONS IN DESIGN FOR TESTABILITY AND BUILT-IN SELF-TEST von Stroud, C.E.

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Built-in self-test for high-speed data-path circuitry von Stroud, C.E.

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