Modular error detection for bit-serial multiplication von Brosnan, T.J., Strader, N.R.

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Effects of subharmonic frequencies on DFT coefficients von Strader, N.R.

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Commercial design verification: methodology and tools von Pixley, C., Strader, N.R., Bruce, W.C., Jaehong Park, Kaufmann, M., Shultz, K., Burns, M., Kumar, J., Jun Yuan, Nguyen, J.

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CMOS ROM arrays programmable by laser beam scanning von Lee, J.J., Strader, N.R.

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A Canonical Bit-Sequential Multiplier von Strader, N R, Rhyne, V T

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A VLSI-Based I/O Formatting Device von White, S W, STRADER, N R, I I, Rhyne, V T

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Architectural yield optimization for WSI von Harden, J.C., Stader, N.R.

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