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  1. 1
    Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis

    Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis von Stanisic, B.R., Verghese, N.K., Rutenbar, R.A., Carley, L.R., Allstot, D.J.


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  2. 2
    Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization

    Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization von Stanisic, B.R., Rutenbar, R.A., Carley, L.R.


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  3. 3
    VHDL modeling for analog-digital hardware designs (VHSIS hardware description language)

    VHDL modeling for analog-digital hardware designs (VHSIS hardware description language) von Stanisic, B.R., Brown, M.W.

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  4. 4
    Power distribution synthesis for analog and mixed-signal ASICs in RAIL

    Power distribution synthesis for analog and mixed-signal ASICs in RAIL von Stanisic, B.R., Rutenbar, R.A., Carley, L.R.

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  5. 5
    Mixed-signal noise-decoupling via simultaneous power distribution design and cell customization in RAIL

    Mixed-signal noise-decoupling via simultaneous power distribution design and cell customization in RAIL von Stanisic, B.R., Rutenbar, R.A., Carley, L.R.

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