System and method for schedule-based I/O multiplexing for integrated circuit (IC) scan test von Biswas, Sounil

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Reducing Test Execution Cost of Integrated, Heterogeneous Systems Using Continuous Test Data von Biswas, S, Blanton, R D

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Reducing test cost of integrated, heterogeneous systems using pass-fail test data analysis von Biswas, Sounil, Wang, Hongfei, Blanton, R. D. (Shawn)

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Statistical Test Compaction Using Binary Decision Trees von Sounil Biswas, Blanton, R.D.

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METHOD, SYSTEM AND DEVICE OF SERIALIZING AND DE-SERIALIZING THE DELIVERY OF SCAN TEST DATA THROUGH CHIP I/O TO REDUCE THE SCAN TEST DURATION OF AN INTEGRATED CIRCUIT von Zhong, Zhanwei, Biswas, Sounil, Wangoo, Amit

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Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data von Biswas, S., Blanton, R.D.

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Maintaining Accuracy of Test Compaction through Adaptive Re-learning von Biswas, S., Blanton, R.D.

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Improving the Accuracy of Test Compaction through Adaptive Test Update von Biswas, S., Blanton, R.D.

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Specification Test Compaction for Analog Circuits and MEMS von Biswas, Sounil, Li, Peng, Blanton, R. D. (Shawn), Pileggi, Larry T.

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An Industrial Study of System-Level Test von Biswas, S., Cory, B.

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Generalized sensitization using fault tuples von Biswas, S., Dwarakanath, K.N., Blanton, R.D.

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Specification Test Compaction for Analog Circuits and MEMS von Biswas, Sounil, Li, Peng, D, R, Blanton, Pileggi, Larry T

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Specification Test Compaction for Analog Circuits and MEMS von Biswas, Sounil, Li, Peng, R D, Blanton, Pileggi, Larry T

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