CMOS compatible HV gate-shifted LDD-NMOS von Santos, P.M., Casimiro, A.P., Lanca, M., Simas, M.I.C.

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Breakdown voltage improvement of standard MOS technologies targeted at smart power von Mendonca Santos, P., Castro Simas, M.I., Lanca, M., Finco, S., Behrens, F.H.

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Smart power in MOS technologies-an overview von Simas, M.I.C., Santos, P., Casimiro, P., Lanca, M.

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A new concept for cost effective smart power ICs based on a unique cell type von Finco, S., Tavares, P., Casimiro, P., Santos, P., Behrens, F., Simas, M.I.C.

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Fully CMOS compatible gate-shifted LDD-NMOS von Santos, P., Casimiro, A.P., Simas, M.I.C., Lanca, M.

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Power MOSFETs reverse conduction revisited von Ferreira, A., Simas, M.I.C.

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A cost effective smart power approach with NMOS based blocks in standard CMOS technology von Finco, S., Tavares, P., Santos, P., Casimiro, A.P., Behrens, F., Lanca, M., Simas, M.I.C.

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A monolithic smart switching cell targeted to a wide range of low power high density applications von Finco, S., Guilherme, J., Behrens, F.H., Simas, M.I.C.

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