A Cache System Design for CMPs with Built-In Coherence Verification von Dalui, Mamata, Sikdar, Biplab K.

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Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers von Sen, Bibhash, Goswami, Mrinal, Mazumdar, Subhra, Sikdar, Biplab K

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Optimal synthesis of QCA logic circuit eliminating wire-crossings von Nath, Rajdeep Kumar, Sen, Bibhash, Sikdar, Biplab K

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Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU von Sen, Bibhash, Dutta, Manojit, Some, Samik, Sikdar, Biplab K.

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Towards the design of hybrid QCA tiles targeting high fault tolerance von Sen, Bibhash, Dutta, Manojit, Mukherjee, Rijoy, Nath, Rajdeep Kumar, Sinha, Amar Prakash, Sikdar, Biplab K.

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Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability von Sen, Bibhash, Dutta, Manojit, Goswami, Mrinal, Sikdar, Biplab K.

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Reliability-aware design for programmable QCA logic with scalable clocking circuit von Sen, Bibhash, Chowdhury, Mayukh R., Mukherjee, Rijoy, Goswami, Mrinal, Sikdar, Biplab K.

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Identification of Periodic Boundary SACA Rules Exploring NSRT Diagram von Das, Baisakhi, Saha, Mousumi, Das, Nilanjana, Sikdar, Biplab K

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Designing a Deep Neural Network engine for LLC block reuse prediction to mitigate Soft Error in Multicore von Choudhury, Avishek, Mondal, Brototi, Paul, Kolin, Sikdar, Biplab K.

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Design of Testable Adder in Quantum‐dot Cellular Automata with Fault Secure Logic von Goswami, Mrinal, Sen, Bibhash, Mukherjee, Rijoy, Sikdar, Biplab K

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Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor von Choudhury, Avishek, Mondal, Brototi, Paul, Kolin, Sikdar, Biplab K.

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A cellular automata based highly accurate memory test hardware realizing March C von Saha, Mousumi, Dalui, Mamata, Sikdar, Biplab K

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Towards the hierarchical design of multilayer QCA logic circuit von Sen, Bibhash, Nag, Anirban, De, Asmit, Sikdar, Biplab K.

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Evolving Cellular automata as pattern classifier von GANGULY, Niloy, MAJI, Pradipta, DHAR, Sandip, SIKDAR, Biplab K, PAL CHAUDHURI, P

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A Scalable Test Structure for Multicore Chip von Das, Sukanta, Sikdar, Biplab K.

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CA Based Document Compression Technology von Shaw, Chandrama, Sikdar, Biplab K., Maiti, N. C.

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Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time von Das, Sukanta, Kundu, Anirban, Sikdar, Biplab K, Chaudhuri, P Pal

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Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach von Pramanik, Amit Kumar, Pal, Jayanta, Sikdar, Biplab K., Sen, Bibhash

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A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area von Sikdar, Biplab K, Roy, S, Das, Debesh K

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Multilayer design of QCA multiplexer von Sen, Bibhash, Nag, Anirban, De, Asmit, Sikdar, Biplab K.

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