An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs von Pasandi, Ghasem, Fakhraie, Sied Mehdi

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A Novel Integer-Bit Estimation Scheme in Digital Filters Based on Probabilistic Behavior of Signals in the Internal Nodes von Najjarzadegan, Mohammad, Pasandi, Ghasem, Fakhraie, Sied Mehdi

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Ultralow-Energy Variation-Aware Design: Adder Architecture Study von Dorosti, Hamed, Teymouri, Ali, Fakhraie, Sied Mehdi, Salehi, Mostafa E.

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A 256-kb 9T Near-Threshold SRAM With 1k Cells per Bitline and Enhanced Write and Read Operations von Pasandi, Ghasem, Fakhraie, Sied Mehdi

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Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs von Salehi, M. E., Samadi, M., Najibi, M., Afzali-Kusha, Ali, Pedram, M., Fakhraie, S. M.

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An accurate model for soft error rate estimation considering dynamic voltage and frequency scaling effects von Firouzi, Farshad, Salehi, Mostafa E., Wang, Fan, Fakhraie, Sied Mehdi

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Adaptive fault-tolerant DVFS with dynamic online AVF prediction von Firouzi, Farshad, Azarpeyvand, Ali, Salehi, Mostafa E., Fakhraie, Sied Mehdi

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Computationally efficient active rule detection method: Algorithm and architecture von Hamzeh, Mahdi, Mahdiani, Hamid Reza, Saghafi, Ahmad, Fakhraie, Sied Mehdi, Lucas, Caro

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Relaxed Fault-Tolerant Hardware Implementation of Neural Networks in the Presence of Multiple Transient Errors von Mahdiani, H. R., Fakhraie, S. M., Lucas, C.

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Low-cost fault tolerance in evolvable multiprocessor systems： a graceful degradation approach von Vakili, Shervin, Fakhraie, Sied Mehdi, Mohammadi, Siamak, Ahmadi, Ali

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Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence von Farmahini-Farahani, A., Fakhraie, S.M., Safari, S.

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Algorithm and FPGA implementation of interpolation-based soft output MMSE MIMO detector for 3GPP LTE von Salari, Amin, Fakhraie, Sied Mehdi, Abbasfar, Aliazam

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Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications von Nakhaee, Farzaneh, Kamal, Mehdi, Afzali-Kusha, Ali, Pedram, Massoud, Fakhraie, Sied Mehdi, Dorosti, Hamed

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Reliability aware throughput management of chip multi-processor architecture via thread migration von Pouyan, Fatemeh, Azarpeyvand, Ali, Safari, Saeed, Fakhraie, Sied Mehdi

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Power Efficient High-Level Synthesis by Centralized and Fine-Grained Clock Gating von Riahi Alam, Mohsen, Ersali Salehi Nasab, Mostafa, Fakhraie, Sied Mehdi

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Out-of-band power reduction by using computationally efficient cancellation pulses von Aliasgari, Mohammad, Abbasfar, Aliazam, Fakhraie, Sied Mehdi

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Coding techniques to mitigate out-of-band radiation in high data rate OFDM-based cognitive radios von Aliasgari, Mohammad, Abbasfar, Aliazam, Fakhraie, Sied Mehdi

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Multiplierless filter‐bank based multicarrier system by using canonical signed digit representation von Aliasgari, Mohammad, Marghi, Yeganeh M., Baharani, Mohammadreza, Fakhraie, Sied Mehdi

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An analytical method for reliability aware instruction set extension von Azarpeyvand, Ali, Salehi, Mostafa E., Fakhraie, Sied Mehdi

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Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization von Farmahini-Farahani, Amin, Vakili, Shervin, Fakhraie, Sied Mehdi, Safari, Saeed, Lucas, Caro

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