Open Defect Detection in Assembled Circuit Boards With Built-In Relaxation Oscillators von Ikiri, Yuki, Sako, Fumiya, Hashizume, Masaki, Yotsuyanagi, Hiroyuki, Lu, Shyue-Kung, Yazaki, Toru, Ikeda, Yasuhiro, Uematsu, Yutaka

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Fault-Aware Dependability Enhancement Techniques for Flash Memories von Lu, Shyue-Kung, Yu, Shu-Chi, Hsu, Chun-Lung, Sun, Chi-Tien, Hashizume, Masaki, Yotsuyanagi, Hiroyuki

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Open Defect Detection Not Utilizing Boundary Scan Flip-Flops in Assembled Circuit Boards von Kanda, Michiya, Hashizume, Masaki, Binti ALI, Fara Ashikin, Yotsuyanagi, Hiroyuki, Lu, Shyue-Kung

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Enhanced Built-In Self-Repair Techniques for Improving Fabrication Yield and Reliability of Embedded Memories von Shyue-Kung Lu, Cheng-Ju Tsai, Hashizume, Masaki

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Fault-Aware Dependability Enhancement Techniques for Phase Change Memory von Lu, Shyue-Kung, Li, Hui-Ping, Miyase, Kohei, Hsu, Chun-Lung, Sun, Chi-Tien

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Fault Leveling Techniques for Yield and Reliability Enhancement of NAND Flash Memories von Lu, Shyue-Kung, Zhong, Shang-Xiu, Hashizume, Masaki

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Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM von Lu, Shyue-Kung, Huang, Hung-Kai, Hsu, Chun-Lung, Sun, Chi-Tien, Miyase, Kohei

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Efficient BISR Techniques for Embedded Memories Considering Cluster Faults von LU, Shyue-Kung, YANG, Chun-Lin, HSIAO, Yuang-Cheng, WU, Cheng-Wen

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Address Remapping Techniques for Enhancing Fabrication Yield of Embedded Memories von Lu, Shyue-Kung, Jheng, Hao-Cheng, Lin, Hao-Wei, Hashizume, Masaki

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Address Scrambling and Data Inversion Techniques for Yield Enhancement of NROM-Based ROMs von Shyue-Kung Lu, Tsu-Lin Li, Hashizume, Masaki, Jiann-Liang Chen

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Efficient Built-In Self-Repair Techniques for Multiple Repairable Embedded RAMs von Shyue-Kung Lu, Zhen-Yu Wang, Yi-Ming Tsai, Jiann-Liang Chen

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Synergistic Reliability and Yield Enhancement Techniques for Embedded SRAMs von Shyue-Kung Lu, Huan-Hua Huang, Jiun-Lang Huang, Ning, Pony

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A Power Saving Mechanism for Multimedia Streaming Services in Cloud Computing von Ma, Yi-Wei, Chen, Jiann-Liang, Chou, Ching-Hesign, Lu, Shyue-Kung

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Fault tolerance techniques for high capacity RAM von Lu, S.-K., Hsu, C.-H.

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OBDD-based evaluation of k-terminal network reliability von Yeh, Fu-Min, Lu, Shyue-Kung, Kuo, Sy-Yen

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A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs von ASHIKIN, Fara, HASHIZUME, Masaki, YOTSUYANAGI, Hiroyuki, LU, Shyue-Kung, ROTH, Zvi

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Efficient built-in redundancy analysis for embedded memories with 2-D redundancy von Shyue-Kung Lu, Yu-Chen Tsai, Hsu, C.-H., Kuo-Hua Wang, Cheng-Wen Wu

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Determining terminal-pair reliability based on edge expansion diagrams using OBDD von Suo, Sy-Yen, Lu, Shyue-Kung, Yeh, Fu-Min

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A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs von Widiant, HASHIZUME, Masaki, SUENAGA, Shohei, YOTSUYANAGI, Hiroyuki, ONO, Akira, LU, Shyue-Kung, ROTH, Zvi

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Yield enhancement techniques for 3-dimensional random access memories von Lu, Shyue-Kung, Chang, Tin-Wei, Hsu, Han-Yu

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