MITA: Multi-Input Adaptive Activation Function for Accurate Binary Neural Network Hardware von ZHANG, Peiqi, TAKAMAEDA-YAMAZAKI, Shinya

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Quantification of glucosinolates in nozawana (Brassica rapa L.) and evaluation via single- and multi-laboratory validation studies von Yamazaki, Shinya, Kuribayashi, Takeshi, Mizutani, Tomohiro

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Effect of citric acid and calcium chloride combined with medium high hydrostatic pressure – medium high temperature on polyphenol oxidase activity and browning in Fuji apple compot... von Yamazaki, Shinya, Kaneko, Shoji, Takahashi, Yuta, Amano, Yoshihiko

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Promotion of Thermal Inactivation Treatment of Apple Polyphenol Oxidase in the Presence of Trehalose von Yamazaki, Shinya, Shirata, Ibuki, Mizuno, Masahiro, Amano, Yoshihiko

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BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W von Ando, Kota, Ueyoshi, Kodai, Orimo, Kentaro, Yonekawa, Haruyoshi, Sato, Shimpei, Nakahara, Hiroki, Takamaeda-Yamazaki, Shinya, Ikebe, Masayuki, Asai, Tetsuya, Kuroda, Tadahiro, Motomura, Masato

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Buckwheat Flour and Its Starch Prevent Age-Related Cognitive Decline by Increasing Hippocampal BDNF Production in Senescence-Accelerated Mouse Prone 8 Mice von Katayama, Shigeru, Okahata, Chizuru, Onozato, Masashi, Minami, Takaaki, Maeshima, Masanaga, Ogihara, Kazuaki, Yamazaki, Shinya, Takahashi, Yuta, Nakamura, Soichiro

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FPGA-Based Annealing Processor with Time-Division Multiplexing von YAMAMOTO, Kasho, IKEBE, Masayuki, ASAI, Tetsuya, MOTOMURA, Masato, TAKAMAEDA-YAMAZAKI, Shinya

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QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3-D SRAM Using Inductive Coupling Technology in 40-nm CMOS von Ueyoshi, Kodai, Ando, Kota, Hirose, Kazutoshi, Takamaeda-Yamazaki, Shinya, Hamada, Mototsugu, Kuroda, Tadahiro, Motomura, Masato

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Evaluating bio-physicochemical properties of raw powder prepared from whole larvae containing liquid silk of the domestic silkworm von Hashimoto, Shusuke, Yamazaki, Maki, Uehara, Hiroshi, Yamazaki, Shinya, Kobayashi, Masakazu, Yokoyama, Takeshi, Yazawa, Kenjiro, Shiomi, Kunihiro

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Exercise-induced Atrioventricular Block with Coronary Artery Stenosis that Appeared Five Years after Bypass Surgery von Yamazaki, Shinya, Kato, Taku, Ushimaru, Shunpei, Yokoi, Hirokazu, Mani, Hiroki

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Scalable Moment Propagation and Analysis of Variational Distributions for Practical Bayesian Deep Learning von Hirayama, Yuki, Takamaeda-Yamazaki, Shinya

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Immunohistochemical Analysis of Nerve Distribution in Mandible of Rats von Kudo, Kanae, Tanaka, Katsunori, Ambe, Kimiharu, Kawaai, Hiroyoshi, Yamazaki, Shinya

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Cachet: Low-Overhead Integrity Verification on Metadata Cache in Secure Nonvolatile Memory Systems von Kubo, Tatsuya, Takamaeda-Yamazaki, Shinya

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Cachet: Low-Overhead Integrity Verification on Metadata Cache in Secure Non-Volatile Memory Systems von Kubo, Tatsuya, Takamaeda-Yamazaki, Shinya

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Performance Optimization of Light-Field Applications on GPU von YUTTAKONKIT, Yuttakon, TAKAMAEDA-YAMAZAKI, Shinya, NAKASHIMA, Yasuhiko

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Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks von ANDO, Kota, UEYOSHI, Kodai, OBA, Yuka, HIROSE, Kazutoshi, UEMATSU, Ryota, KUDO, Takumi, IKEBE, Masayuki, ASAI, Tetsuya, TAKAMAEDA-YAMAZAKI, Shinya, MOTOMURA, Masato

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Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture von Hirose, Kazutoshi, Takamaeda-Yamazaki, Shinya, Yu, Jaehoon, Motomura, Masato

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A model for predicting the time of early symptomatic restenosis after infrapopliteal angioplasty in patients with critical limb ischemia von Yanagiuchi, Takashi, Kato, Taku, Hiroe, Takanori, Yabuta, Junki, Hanabusa, Katsuyuki, Ota, Yutaro, Komai, Tsubasa, Yamazaki, Shinya, Ushimaru, Shunpei, Kurimoto, Ritsuko, Yokoi, Hirokazu, Mani, Hiroki, Zen, Kan, Matoba, Satoaki

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A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing von VU, Hoang-Gia, TAKAMAEDA-YAMAZAKI, Shinya, NAKADA, Takashi, NAKASHIMA, Yasuhiko

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Ultrasmall: A Tiny Soft Processor Architecture with Multi-Bit Serial Datapaths for FPGAs von TAKAMAEDA-YAMAZAKI, Shinya, NAKATSUKA, Hiroshi, TANAKA, Yuichiro, KISE, Kenji

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