An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator von Mo Huang, Yan Lu, Seng-Pan U, Martins, Rui P.

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A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS von Yan Zhu, Chi-Hang Chan, U-Fat Chio, Sai-Weng Sin, Seng-Pan U, Martins, Rui Paulo, Maloberti, Franco

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A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH \Delta \Sigma Modulator With Multirate Opamp Sharing von Liang Qi, Sai-Weng Sin, Seng-Pan U, Maloberti, Franco, Martins, Rui Paulo

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A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration von Chi-Hang Chan, Yan Zhu, Wai-Hong Zhang, Seng-Pan U, Martins, Rui Paulo

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A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation von Huang, Mo, Lu, Yan, Sin, Sai-Weng, Seng-Pan, U., Martins, Rui P.

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A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting von Lu, Yan, Dai, Haojuan, Huang, Mo, Law, Man-Kay, Sin, Sai-Weng, Seng-Pan, U., Martins, Rui P.

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A 2.63 μW ECG Processor With Adaptive Arrhythmia Detection and Data Compression for Implantable Cardiac Monitoring Device von Yin, Yue, Abubakar, Syed Muhammad, Tan, Songyao, Shi, Jiahua, Yang, Peilin, Yang, Wendi, Jiang, Hanjun, Wang, Zhihua, Jia, Wen, U, Seng-Pan

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An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SAR ADC in 65 nm CMOS von Yan Zhu, Chi-Hang Chan, Seng-Pan U, Martins, Rui Paulo

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A Dual-Output Wireless Power Transfer System With Active Rectifier and Three-Level Operation von Yan Lu, Mo Huang, Lin Cheng, Wing-Hung Ki, Seng-Pan U, Martins, Rui P.

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A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC von Chan, Chi-Hang, Zhu, Yan, Sin, Sai-Weng, Ben U, Seng-Pan, Martins, Rui Paulo

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60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration von Chan, Chi-Hang, Zhu, Yan, Li, Cheng, Zhang, Wai-Hong, Ho, Iok-Meng, Wei, Lai, U, Seng-Pan, Martins, Rui Paulo

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A 312 ps response-time LDO with enhanced super source follower in 28 nm CMOS von Lu, Yan, Li, Cheng, Zhu, Yan, Huang, Mo, U, Seng-Pan, Martins, Rui P

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A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations von Zhu, Yan, Chan, Chi-Hang, U, Seng Pan, Martins, Rui Paulo

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Limit Cycle Oscillation Reduction for Digital Low Dropout Regulators von Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Martins, Rui P., Wing-Hung Ki

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Active–Passive \Delta \Sigma Modulator for High-Resolution and Low-Power Applications von Hussain, Arshad, Sai-Weng Sin, Chi-Hang Chan, Seng-Pan Ben U, Maloberti, Franco, Martins, Rui P.

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Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC von Yan Zhu, Chi-Hang Chan, Si-Seng Wong, U Seng-Pan, Martins, Rui Paulo

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Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs von Jianyu Zhong, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Martins, Rui Paulo

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An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC von Hegong Wei, Chi-Hang Chan, U-Fat Chio, Sai-Weng Sin, Seng-Pan U, Martins, R. P., Maloberti, F.

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Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector von Liu, Jianwei, Chan, Chi-Hang, Sin, Sai-Weng, Seng-Pan, U., Martins, R.P.

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Analysis of Common-Mode Interference and Jitter of Clock Receiver Circuits With Improved Topology von Yang, Xiaofeng, Zhu, Yan, Chan, Chi-Hang, U, Seng-Pan, Martins, Rui P.

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