Effect of electron irradiation on electrophysical properties of CdSe and CdS thin films von Spânulescu, I., Secǎreanu, I., Bǎlţǎţeanu, N., Abdi, Ibrahim Zaker, Khalass, Tallal

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Electron irradiation effect on vacuum-evaporated CdS thin layers von CRISTEA, P, SPANAULESCU, I, SECAREANU, I, RUXANDRA, V, SPANULESCU, S, BALTATEANU, N

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Platform-Based Behavior-Level and System-Level Synthesis von Cong, J., Yiping Fan, Guoling Han, Wei Jiang, Zhiru Zhang

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3-D Topologies for Networks-on-Chip von Pavlidis, V.F., Friedman, E.G.

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Modeling the Impact of Process Variation on Critical Charge Distribution von Qian Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie

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Robust Sense Amplifier Design under Random Dopant Fluctuations in Nano-Scale CMOS Technologies von Yeung, J., Mahmoodi, H.

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Analysis of Subthreshold Finfet Circuits for Ultra-Low Power Design von Xiaoxia Wu, Feng Wang, Yuan Xie

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A low complexity, low power, programmable QRS detector based on wavelet transform for Implantable Pacemaker IC von Thanh-Tung Hoang, Jong-Pil Son, Yu-Ri Kang, Chae-Ryung Kim, Hae-Young Chung, Soo-Won Kim

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VLSI Architecture for Encryption and Watermarking Units Towards the Making of a Secure Camera von Adamo, O.B., Mohanty, S.P., Kougianos, E., Varanasi, M.

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Novel Ternary Storage Cells and Techniques for Leakage Reduction in Ternary CAM von Mohan, N., Sachdev, M.

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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping von Chun-Ming Huang, Kuen-Jong Lee, Chih-Chyau Yang, Wen-Hsiang Hu, Shi-Shen Wang, Jeng-Bin Chen, Chi-Shi Chen, Van, L.-D., Chien-Ming Wu, Wei-Chang Tsai, Jing-Yang Jou

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Effects of Interconnect Process Variations on Signal Integrity von Demircan, E.

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On Achieving Low-Power SoC Clock Tree Synthesis by Transition Time Planning via Buffer Library Study von Huang-Liang Chen, Hung-Ming Chen

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Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems von Le Gal, B., Andriamisainat, C., Casseaut, E.

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Crosstalk-aware Energy Reduction in NoC Communication Fabrics von Pande, P.P., Haibo Zhu, Ganguly, A., Grecu, C.

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MTNET: Design and Optimization of a Wireless SOC Test Framework von Dan Zhao, Yi Wang

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A Low-swing Signaling Circuit Technique for 65nm On-chip Interconnects von Venkatraman, V., Anders, M., Kaul, H., Burleson, W., Krishnamurthy, R.

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Memories: Exploiting Them and Developing Them von Reohr, W.R.

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