Internet of Things: Architectures, Protocols, and Applications von Sethi, Pallavi, Sarangi, Smruti R.

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A Survey of On-Chip Optical Interconnects von Bashir, Janibul, Peter, Eldhose, Sarangi, Smruti R.

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A Survey of Chip-level Thermal Simulators von Sultan, Hameedah, Chauhan, Anjali, Sarangi, Smruti R.

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A Fast Leakage-Aware Green's-Function-Based Thermal Simulator for 3-D Chips von Sultan, Hameedah, Sarangi, Smruti R.

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FaaSCtrl: A Comprehensive-Latency Controller for Serverless Platforms von Panda, Abhisek, Sarangi, Smruti R.

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Toward an Optimal Countermeasure for Cache Side-Channel Attacks von Shrivastava, Nivedita, Sarangi, Smruti R.

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A Formal Approach to Accountability in Heterogeneous Systems-on-Chip von Kalayappan, Rajshekar, Sarangi, Smruti R.

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Enhancing Network-on-Chip Performance by Reusing Trace Buffers von Jindal, Neetu, Gupta, Shubhani, Ravipati, Divya Praneetha, Panda, Preeti Ranjan, Sarangi, Smruti R.

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VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors von Moolchandani, Diksha, Kumar, Anshul, Martinez, Jose F., Sarangi, Smruti R.

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VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects von Sarangi, S.R., Greskamp, B., Teodorescu, R., Nakano, J., Tiwari, A., Torrellas, J.

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Reusing Trace Buffers as Victim Caches von Jindal, Neetu, Panda, Preeti Ranjan, Sarangi, Smruti R.

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SmrtSwarm: A Novel Swarming Model for Real-World Environments von Bhamu, Nikita, Verma, Harshit, Dixit, Akanksha, Bollard, Barbara, Sarangi, Smruti R.

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PC-ILP: A Fast and Intuitive Method to Place Electric Vehicle Charging Stations in Smart Cities von Bose, Mehul, Dutta, Bivas Ranjan, Shrivastava, Nivedita, Sarangi, Smruti R.

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Lock-Free and Wait-Free Slot Scheduling Algorithms von Aggarwal, Pooja, Sarangi, Smruti R.

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A Survey of Checker Architectures von KALAYAPPAN, Rajshekar, SARANGI, Smruti R

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FP-NUCA: A Fast NOC Layer for Implementing Large NUCA Caches von Arora, Anuj, Harne, Mayur, Sultan, Hameedah, Bagaria, Akriti, Sarangi, Smruti R.

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Managing Trace Summaries to Minimize Stalls During Postsilicon Validation von Chandran, Sandeep, Panda, Preeti Ranjan, Sarangi, Smruti R., Bhattacharyya, Ayan, Chauhan, Deepak, Kumar, Sharad

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Area-Aware Cache Update Trackers for Postsilicon Validation von Chandran, Sandeep, Sarangi, Smruti R., Panda, Preeti Ranjan

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Architectural Support for Handling Jitterin Shared Memory Based Parallel Applications von Chandran, Sandeep, Kallurkar, Prathmesh, Gupta, Parul, Sarangi, Smruti R.

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FluidCheck: A Redundant Threading-Based Approach for Reliable Execution in Manycore Processors von Kalayappan, Rajshekar, Sarangi, Smruti R.

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