An active inductor employed CML latch for high speed integrated circuits von Singh, Puneet, Singh, Mayank Kumar, Hande, Vinayak Gopal, Sakare, Mahendra

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A Power and Area Efficient Architecture of a PRBS Generator With Multiple Outputs von Sakare, Mahendra

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SpiMAM: CMOS Implementation of Bio-Inspired Spiking Multidirectional Associative Memory Featuring In-Situ Learning von Vohra, Sahibia Kaur, Sakare, Mahendra, James, Alex P., Das, Devarshi Mrinal

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Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse von Vohra, Sahibia Kaur, Thomas, Sherin A., Shivdeep, Sakare, Mahendra, Das, Devarshi Mrinal

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Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons von Vohra, Sahibia Kaur, Thomas, Sherin A., Sakare, Mahendra, Das, Devarshi Mrinal

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A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks von Singh, Mayank Kumar, Singh, Puneet, Chichhula, Upendra, Mehra, Hirensh, Das, Devarshi Mrinal, Sakare, Mahendra

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Bandwidth Enhancement of Flip-Flops Using Feedback for High-Speed Integrated Circuits von Sakare, Mahendra, Pavan Kumar, Sadhu, Gupta, Shalabh

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CMOS Circuit Implementation of Spiking Neural Network for Pattern Recognition Using On-chip Unsupervised STDP Learning von Vohra, Sahibia Kaur, Thomas, Sherin A, Sakare, Mahendra, Das, Devarshi Mrinal

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Pseudo-random binary sequences (PRBS) generator for performing on-chip testing and a method thereof von Das, Devarshi Mrinal, Sakare, Mahendra, Singh, Mayank Kumar, Hande, Vinayak Gopal, Singh, Puneet

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PSEUDO-RANDOM BINARY SEQUENCES (PRBS) GENERATOR FOR PERFORMING ON-CHIP TESTING AND A METHOD THEREOF von SAKARE, Mahendra, SINGH, Puneet, DAS, Devarshi Mrinal, HANDE, Vinayak Gopal, SINGH, Mayank Kumar

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CMOS Circuit Implementation of Spiking Neural Network for Pattern Recognition Using On-chip Unsupervised STDP Learning von Vohra, Sahibia Kaur, Thomas, Sherin A, Sakare, Mahendra, Devarshi Mrinal Das

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Circuit for improving clock rates in high speed electronic circuits using feedback based flip-flops von Shalabh, Gupta, Mahendra, Sakare, Pavan, Kumar Sadhu

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CIRCUIT FOR IMPROVING CLOCK RATES IN HIGH SPEED ELECTRONIC CIRCUITS USING FEEDBACK BASED FLIP-FLOPS von SHALABH GUPTA, PAVAN KUMAR SADHU, MAHENDRA SAKARE

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A 4 × 20 Gb/s 29-1 PRBS Generator for Testing a High-Speed DAC in 90nm CMOS Technology von Sakare, Mahendra, Singh, Mohit, Gupta, Shalabh

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