Hunter–prey optimization: algorithm and applications von Naruei, Iraj, Keynia, Farshid, Sabbagh Molahosseini, Amir

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Efficient Modular Adder Designs Based on Thermometer and One-Hot Coding von Jafarzadehpour, Fereshteh, Sabbagh Molahosseini, Amir, Emrani Zarandi, Azadeh Alsadat, Sousa, Leonel

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Zero-Aware Low-Precision RNS Scaling Scheme von Sabbagh Molahosseini, Amir

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A joint computational and resource allocation model for fast parallel data processing in fog computing von Lakzaei, Mahmood, Sattari-Naeini, Vahid, Sabbagh Molahosseini, Amir, Javadpour, Amir

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Increasing fault tolerance of data plane on the internet of things using the software-defined networks von Bakhshi Kiadehi, Katayoun, Rahmani, Amir Masoud, Sabbagh Molahosseini, Amir

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An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form \, 2^-1 von Alsadat Emrani Zarandi, Azadeh, Sabbagh Molahosseini, Amir, Sousa, Leonel, Hosseinzadeh, Mehdi

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A fault-tolerant architecture for internet-of-things based on software-defined networks von Bakhshi Kiadehi, Katayoun, Rahmani, Amir Masoud, Sabbagh Molahosseini, Amir

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A Reliable Leakage Reduction Technique for Approximate Full Adder with Reduced Ground Bounce Noise von Goyal, Candy, Raj, Balwinder, Ubhi, Jagpal Singh

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An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology von Mtibaa, Abdellatif, Ouni, Bouraoui, Touil, Lamjed, Gassoumi, Ismail

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Research on Adaptive Suppression of LCL Converter Resonance Grid-Connected System von Li, Junwei, Li, Junke, Tang, Yafang

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Efficient Incorporation of the RNS Datapath in Reverse Converter von Taheri, MohammadReza, Molahosseini, Amir Sabbagh, Navi, Keivan

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uLog: a software-based approximate logarithmic number system for computations on SIMD processors von Jahanshahi, Saeedeh, Molahosseini, Amir Sabbagh, Zarandi, Azadeh Alsadat Emrani

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High-Performance and Energy-Area Efficient Approximate Full Adder for Error Tolerant Applications von Mohammadi, Akram, Mohammadi Ghanatghestani, Mokhtar, Sabbagh Molahosseini, Amir, Safaei Mehrabani, Yavar

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Variable Latency Carry Speculative Adders with Input-based Dynamic Configuration von Ghabeli, Hoda, Sabbagh Molahosseini, Amir, Emrani Zarandi, Azadeh Alsadat, Sousa, Leonel

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An efficient FPGA implementation of hand gestures recognition based on neural networks von Abdolazimi, Ali, Sabbagh Molahosseini, Amir, Keynia, Farshid

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A General Reverse Converter Architecture with Low Complexity and High Performance von NAVI, Keivan, ESMAEILDOUST, Mohammad, MOLAHOSSEINI, Amir SABBAGH

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Efficient programmable power‐of‐two scaler for the three‐moduli set {2n+p, 2n − 1, 2n+1 − 1} von Taheri, MohammadReza, Navi, Keivan, Sabbagh Molahosseini, Amir

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The use of reversible logic gates in the design of residue number systems von Asadpour, Ailin, Molahosseini, Amir Sabbagh, Emrani Zarandi, Azadeh Alsadat

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A novel fast and small XOR-base full-adder in quantum-dot cellular automata von Mousavi, Hadisseh Ahmadi, Keshavarzian, Peiman, Molahosseini, Amir Sabbagh

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Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n-1, 2n+1-1} and {22n, 2n-1, 2n-1-1} von MOLAHOSSEINI, Amir Sabbagh, DADKHAH, Chitra, NAVI, Keivan, ESHGHI, Mohammad

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