Experimental investigation of the temperature dependence of GaAs FET equivalent circuits von Anholt, R.E., Swirhun, S.E.

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Modeling and measurement of contact resistances von Loh, W.M., Swirhun, S.E., Schreyer, T.A., Swanson, R.M., Saraswat, K.C.

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Point-contact silicon solar cells von Swanson, R.M., Beckwith, S.K., Crane, R.A., Eades, W.D., Young Hoon Kwark, Sinton, R.A., Swirhun, S.E.

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Fiber optics module mounted to the faceplate of a plug-in card von SWIRHUN STANLEY E, GHISONI MARCO U.P

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Two-dimensional numerical analysis of latchup in a VLSI CMOS technology von Sangiorgi, E.C., Pinto, M.R., Swirhun, S.E., Dutton, R.W.

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Closely-spaced VCSEL and photodetector for application requiring their independent operation von SCOTT JEFFREY W, SWIRHUN STANLEY E

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Closely-spaced VCSEL and photodetector for application requiring their independent operation von Swirhun, Stanley E, Scott, Jeffrey W

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FET having a dielectrically isolated gate connect von SWIRHUN, STANLEY E

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FET having minimized parasitic gate capacitance von SWIRHUN, STANLEY E

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FET having minimized parasitic gate capacitance von SWIRHUN, STANLEY E

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Method for fabricating a FET having a dielectrically isolated gate connect von SWIRHUN, STANLEY E

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FET HAVING MINIMIZED PARASITIC GATE CAPACITANCE von SWIRHUN, STANLEY, E

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FELT HAVING A DIELECTRICALLY ISOLATED GATE CONNECT von SWIRHUN, STANLEY, E

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Closely-spaced VCSEL and photodetector for applications requiring their independent operation von SCOTT JEFFREY W, SWIRHUN STANLEY E

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Closely-spaced VCSEL and photodetector for applications requiring their independent operation von Swirhun, Stanley E, Scott, Jeffrey W

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Closely-spaced VCSEL and photodetector for application requiring their independent operation von SCOTT JEFFREY W, SWIRHUN STANLEY E

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A VLSI-suitable Schottky-barrier CMOS process von Swirhun, S.E., Sangiorgi, E., Weeks, A.J., Swanson, R.M., Saraswat, K.C., Dutton, R.W.

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Method for making closely-spaced VCSEL and photodetector on a substrate von SWIRHUN, STANLEY E, SCOTT, JEFFREY W

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Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology von Sangiorgi, E.C., Pinto, M.R., Swirhun, S.E., Dutton, R.W.

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Control circuits for parallel optical interconnects von SWIRHUN, STANLEY E, MACTAGGART, IAIN R

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