Parallel state-space search for a first solution with consistent linear speedups von KALE, L. V, SALETORE, V. A

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ETA: experience with an Intel Xeon processor as a packet processing engine von Regnier, G., Minturn, D., McAlpine, G., Saletore, V.A., Foong, A.

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Self-scheduling on distributed-memory machines von Liu, J., Saletore, V. A.

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Safe self-scheduling : a parallel loop scheduling scheme for shared-memory multiprocessors von JIE LIU, SALETORE, V. A, LEWIS, T. G

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Scheduling non-uniform parallel loops on distributed memory machines von Saletore, V.A., Liu, J., Lam, Y.B.

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Cure kinetics of multifunctional epoxies with 2,2′-dichloro-4,4′-diaminodiphenylmethane as hardener von Jagadeesh, K. S., Gururaja Rao, J., Shashikiran, K., Suvarna, S., Ambekar, Sarvottam Y., Saletore, Murali, Biswas, C., Rajanna, A. V.

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Prioritization in parallel symbolic computing von Kale, L. V., Ramkumar, B., Saletore, V., Sinha, A. B.

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An architecture for software-based iSCSI on multiprocessor servers von Foong, A., McAlpine, G., Minturn, D., Regnier, G., Saletore, V.

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ETA: experience with an Intel/spl reg/ Xeon/spl trade/ processor as a packet processing engine von Regnier, G., Minturn, D., McAlpine, G., Saletore, V., Foong, A.

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Efficient Parallel Execution of IDA on Shared and Distributed Memory Multiprocessors von Saletore, V.A., Kale, L.V.

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Embedded transport acceleration architecture von McAlpine, Gary L, Minturn, David B, Shah, Hemal V, Foong, Annie, Regnier, Greg J, Saletore, Vikram A

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Embedded transport acceleration architecture von MCALPINE GARY L, SHAH HEMAL V, SALETORE VIKRAM A, MINTURN DAVID B, FOONG ANNIE, REGNIER GREG J

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Embedded transport acceleration architecture von MCALPINE GARY L, SHAH HEMAL V, SALETORE VIKRAM A, MINTURN DAVID B, FOONG ANNIE, REGNIER GREG J

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